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/freebsd/usr.sbin/fstyp/
H A Dhammer2_disk.h76 * are always 64KB. Logical file buffers are typically 16KB. All data
85 * to optimize storage efficiency. The minimum fragment size is 1KB.
94 * A full indirect block use supports 512 x 128-byte blockrefs in a 64KB
95 * buffer. Indirect blocks down to 1KB are supported to keep small
99 * using 64KB indirect blocks (128 byte refs, 512 or radix 9 per indblk).
165 * <= 512KB. Up to 4 directory entries can be referenced from a directory
168 * Indirect blocks are typically either 4KB (64 blockrefs / ~4MB represented),
169 * or 64KB (1024 blockrefs / ~64MB represented).
198 * 1 freemap00 level1 FREEMAP_LEAF (256
[all...]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dp1021rdb-pc.dtsi46 /* 256KB for Vitesse 7385 Switch firmware */
53 /* 256KB for DTB Image */
72 /* 256KB for QE ucode firmware*/
80 /* 512KB for u-boot Bootloader Image */
81 /* 512KB for u-boot Environment Variables */
158 /* 512KB for u-boot Bootloader Image */
165 /* 512KB for DTB Image */
H A Dp1024rdb.dtsi46 /* 256KB for Vitesse 7385 Switch firmware */
53 /* 256KB for DTB Image */
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
137 /* 512KB for u-boot Bootloader Image */
144 /* 512KB for DTB Image */
H A Dp1020rdb-pc.dtsi46 /* 256KB for Vitesse 7385 Switch firmware */
53 /* 256KB for DTB Image */
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
159 /* 512KB for u-boot Bootloader Image */
166 /* 512KB for DTB Image*/
H A Dp1020rdb.dtsi46 /* 256KB for Vitesse 7385 Switch firmware */
53 /* 256KB for DTB Image */
74 /* 512KB for u-boot Bootloader Image */
75 /* 512KB for u-boot Environment Variables */
156 /* 512KB for u-boot Bootloader Image */
163 /* 512KB for DTB Image */
H A Dp2020rdb-pc.dtsi46 /* 256KB for Vitesse 7385 Switch firmware */
53 /* 256KB for DTB Image */
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
159 /* 512KB for u-boot Bootloader Image */
166 /* 512KB for DTB Image */
H A Dp2020rdb.dts46 /* 256KB for Vitesse 7385 Switch firmware */
53 /* 256KB for DTB Image */
74 /* 512KB for u-boot Bootloader Image */
75 /* 512KB for u-boot Environment Variables */
159 /* 512KB for u-boot Bootloader Image */
166 /* 512KB for DTB Image */
H A Dp1025twr.dtsi53 /* 256KB for Vitesse 7385 Switch firmware */
60 /* 256KB for DTB Image */
79 /* 256KB for QE ucode firmware*/
87 /* 512KB for u-boot Bootloader Image */
88 /* 512KB for u-boot Environment Variables */
H A Dp1025rdb.dtsi46 /* 256KB for Vitesse 7385 Switch firmware */
53 /* 256KB for DTB Image */
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
145 /* 512KB for u-boot Bootloader Image */
152 /* 512KB for DTB Image */
H A Dp1020utm-pc.dtsi45 /* 256KB for DTB Image */
64 /* 512KB for u-boot Bootloader Image */
65 /* 512KB for u-boot Environment Variables */
/freebsd/sys/contrib/zstd/lib/compress/
H A Dclevels.h26 { /* "default" - for any srcSize > 256 KB */
47 { 23, 24, 22, 7, 3,256, ZSTD_btultra2}, /* level 19 */
48 { 25, 25, 23, 7, 3,256, ZSTD_btultra2}, /* level 20 */
52 { /* for srcSize <= 256 KB */
71 { 18, 19, 19, 8, 3,256, ZSTD_btultra }, /* level 17.*/
73 { 18, 19, 19, 8, 3,256, ZSTD_btultra2}, /* level 19.*/
78 { /* for srcSize <= 128 KB */
95 { 17, 18, 17, 6, 3,256, ZSTD_btopt }, /* level 15.*/
97 { 17, 18, 17, 8, 3,256, ZSTD_btultra }, /* level 17.*/
99 { 17, 18, 17, 5, 3,256, ZSTD_btultra2}, /* level 19.*/
[all …]
/freebsd/contrib/file/magic/Magdir/
H A Dvirtual83 # VHDX_HEADER signature. 1 header is stored at offset 64KB and the other at 128KB
88 # Creator[256] like "QEMU v3.0.0", "Microsoft Windows 6.3.9600.18512"
89 >>8 lestring16 x \b, by %.256s
90 # The Checksum field is a CRC-32C hash over the entire 4 KB structure
116 # Log Entry Length must be a multiple of 4 KB
117 >>>(0x10048.q+8) ulelong/1024 >4 \b, EntryLength %u KB
118 # Log Entry Tail must be a multiple of 4 KB
137 # VHDX_REGION_TABLE_HEADER Signature 0x69676572~regi at offset 192 KB and 256 KB
140 # region Checksum. CRC-32C hash over the entire 64-KB table
/freebsd/sys/contrib/device-tree/src/arm64/xilinx/
H A Dzynqmp-sm-k26-revA.dts147 reg = <0x0 0x80000>; /* 512KB */
153 reg = <0x80000 0x80000>; /* 512KB */
159 reg = <0x100000 0x20000>; /* 128KB */
163 reg = <0x120000 0x20000>; /* 128KB */
167 reg = <0x140000 0xC0000>; /* 768KB */
175 reg = <0xF00000 0x80000>; /* 512KB */
185 reg = <0x1C80000 0x80000>; /* 512KB */
207 reg = <0x2200000 0x20000>; /* 128KB */
211 reg = <0x2220000 0x20000>; /* 128KB */
215 reg = <0x2240000 0x40000>; /* 256
[all...]
/freebsd/usr.sbin/bhyve/amd64/
H A Dvga.c46 #define KB (1024UL) macro
167 uint8_t dac_palette[3 * 256];
168 uint32_t dac_palette_rgb[256];
222 data = (((sc->vga_ram[offset + 0 * 64*KB] >> bit) & 0x1) << 0) | in vga_get_pixel()
223 (((sc->vga_ram[offset + 1 * 64*KB] >> bit) & 0x1) << 1) | in vga_get_pixel()
224 (((sc->vga_ram[offset + 2 * 64*KB] >> bit) & 0x1) << 2) | in vga_get_pixel()
225 (((sc->vga_ram[offset + 3 * 64*KB] >> bit) & 0x1) << 3); in vga_get_pixel()
269 ch = sc->vga_ram[offset + 0 * 64*KB]; in vga_get_text_pixel()
270 attr = sc->vga_ram[offset + 1 * 64*KB]; in vga_get_text_pixel()
293 font = sc->vga_ram[font_offset + 2 * 64*KB]; in vga_get_text_pixel()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreMachineFunctionInfo.cpp32 // ~256KB (~64Kwords). Thus only for code run on the emulator! in isLargeFrame()
34 // The arbitrary value of 0xf000 allows frames of up to ~240KB before spill in isLargeFrame()
36 // For frames less than 240KB, it is assumed that there will be less than in isLargeFrame()
37 // 16KB of function arguments. in isLargeFrame()
/freebsd/sys/dev/cesa/
H A Dcesa.h33 #define CESA_REQUESTS 256
36 * CESA is able to process data only in CESA SRAM, which is quite small (2 kB).
39 * packets and each packet can hold about 1.75 kB of data.
49 * Expected average request size: 1.5 kB (Ethernet MTU)
50 * Packets per average request: (1.5 kB / 1.75 kB) = 1
60 /* Values below are optimized for requests containing about 1.5 kB of data */
74 * As CESA supports MD5, SHA1 and SHA-256 this equals to 32 bytes.
/freebsd/sys/x86/x86/
H A Didentcpu.c1390 * http://kb.vmware.com/kb/1009458 in identify_hypervisor_cpuid_base()
1840 printf("L1 4KB data TLB: %d entries", (regs[1] >> 16) & 0xff); in print_AMD_info()
1843 printf("L1 4KB instruction TLB: %d entries", regs[1] & 0xff); in print_AMD_info()
1872 printf("L2 4KB data TLB: %d entries", in print_AMD_info()
1876 printf("L2 4KB instruction TLB: %d entries", in print_AMD_info()
1880 printf("L2 4KB unified TLB: %d entries", in print_AMD_info()
1984 printf("Instruction TLB: 4 KB pages, 4-way set associative, 32 entries\n"); in print_INTEL_TLB()
1990 printf("Data TLB: 4 KB pages, 4-way set associative, 64 entries\n"); in print_INTEL_TLB()
1996 printf("1st-level instruction cache: 8 KB, 4-way set associative, 32 byte line size\n"); in print_INTEL_TLB()
1999 printf("1st-level instruction cache: 16 KB, 4-way set associative, 32 byte line size\n"); in print_INTEL_TLB()
[all …]
/freebsd/contrib/netbsd-tests/lib/libc/db/
H A Dh_lfsr.c60 char kb[256]; in main() local
74 key.data = kb; in main()
85 memset(kb, c, key.size); in main()
107 memset(kb, c, key.size); in main()
123 if (memcmp(key.data, kb, key.size) != 0) in main()
138 memset(kb, c, key.size); in main()
160 memset(kb, c, key.size); in main()
/freebsd/sys/contrib/device-tree/Bindings/remoteproc/
H A Dxlnx,zynqmp-r5fss.yaml48 Each RPU contains one 64KB memory and two 32KB memories that
49 are accessed via the TCM A and B port interfaces, for a total of 128KB
50 per processor. In lock-step mode, the processor has access to 256KB of
/freebsd/sys/dev/ixgbe/
H A Dixgbe_dcb.h45 #define IXGBE_DCB_MAX_CREDIT 4095 /* Maximum credit supported: 256KB * 1024 / 64B */
47 /* 513 for 32KB TSO packet */
110 /* PBA[0-7] each use 64KB FIFO */
112 /* PBA[0-3] each use 80KB, PBA[4-7] each use 48KB */
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dxcalibur1501.dts92 reg = <0x7f00000 0x40000>; /* 256 KB */
96 reg = <0x7f40000 0x40000>; /* 256 KB */
100 reg = <0x7f80000 0x80000>; /* 512 KB */
122 reg = <0x7f00000 0x40000>; /* 256 KB */
126 reg = <0x7f40000 0x40000>; /* 256 KB */
130 reg = <0x7f80000 0x80000>; /* 512 KB */
H A Dxpedite5301.dts92 reg = <0x7f00000 0x40000>; /* 256 KB */
96 reg = <0x7f40000 0x40000>; /* 256 KB */
100 reg = <0x7f80000 0x80000>; /* 512 KB */
122 reg = <0x7f00000 0x40000>; /* 256 KB */
126 reg = <0x7f40000 0x40000>; /* 256 KB */
130 reg = <0x7f80000 0x80000>; /* 512 KB */
H A Dxpedite5370.dts90 reg = <0x7f00000 0x40000>; /* 256 KB */
94 reg = <0x7f40000 0x40000>; /* 256 KB */
98 reg = <0x7f80000 0x80000>; /* 512 KB */
120 reg = <0x7f00000 0x40000>; /* 256 KB */
124 reg = <0x7f40000 0x40000>; /* 256 KB */
128 reg = <0x7f80000 0x80000>; /* 512 KB */
/freebsd/contrib/bearssl/src/ssl/
H A Dssl_engine.c273 * 256 bytes for the padding
478 * If using TLS-1.2, then SHA-256 or SHA-384 must be present (or in rng_init()
479 * both); we prefer SHA-256 which is faster for 32-bit systems. in rng_init()
1358 size_t half_len, unsigned char *kb) in compute_key_block() argument
1367 iprf(kb, half_len << 1, in compute_key_block()
1378 unsigned char kb[192]; in br_ssl_engine_switch_cbc_in() local
1396 mac_key_len + cipher_key_len + iv_len, kb); in br_ssl_engine_switch_cbc_in()
1398 mac_key = &kb[mac_key_len]; in br_ssl_engine_switch_cbc_in()
1399 cipher_key = &kb[(mac_key_len << 1) + cipher_key_len]; in br_ssl_engine_switch_cbc_in()
1400 iv = &kb[((mac_key_len + cipher_key_len) << 1) + iv_len]; in br_ssl_engine_switch_cbc_in()
[all …]
/freebsd/sys/contrib/dev/iwlwifi/
H A Diwl-context-info-gen3.h28 * @IWL_PRPH_MTR_FORMAT_256B: 256 bit tfd
52 * 3: 256 bit.
56 * @IWL_PRPH_SCRATCH_RB_SIZE_EXT_8K: 8kB RB size
57 * @IWL_PRPH_SCRATCH_RB_SIZE_EXT_12K: 12kB RB size
58 * @IWL_PRPH_SCRATCH_RB_SIZE_EXT_16K: 16kB RB size

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