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/linux/Documentation/driver-api/
H A Dmtdnand.rst10 The generic NAND driver supports almost all NAND and AG-AND based chips
31 --------------------------
37 - [MTD Interface]
43 - [NAND Interface]
48 - [GENERIC]
53 - [DEFAULT]
65 -------------------------------
71 - [INTERN]
77 - [REPLACEABLE]
86 - [BOARDSPECIFIC]
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/linux/drivers/leds/
H A Dleds-ipaq-micro.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/mfd/ipaq-micro.h>
24 struct ipaq_micro *micro = dev_get_drvdata(led_cdev->dev->parent->parent); in micro_leds_brightness_set()
27 * Byte 0 = LED color: 0 = yellow, 1 = green in micro_leds_brightness_set()
29 * Byte 1 = duration (flags?) appears to be ignored in micro_leds_brightness_set()
30 * Byte 2 = green ontime in 1/10 sec (deciseconds) in micro_leds_brightness_set()
32 * 0 = 256/10 second in micro_leds_brightness_set()
33 * Byte 3 = green offtime in 1/10 sec (deciseconds) in micro_leds_brightness_set()
35 * 0 = 256/10 seconds in micro_leds_brightness_set()
45 msg.tx_data[2] = 0; /* Duty cycle 256 */ in micro_leds_brightness_set()
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/linux/lib/zstd/compress/
H A Dhist.c7 * - FSE source repository : https://github.com/Cyan4973/FiniteStateEntropy
8 * - Public forum : https://groups.google.com/forum/#!forum/lz4c
10 * This source code is licensed under both the BSD-style license (found in the
13 * You may select, at your option, one of the above-listed licenses.
16 /* --- dependencies --- */
17 #include "../common/mem.h" /* U32, BYTE, etc. */
23 /* --- Error management --- */
26 /*-**************************************************************
32 const BYTE* ip = (const BYTE*)src; in HIST_count_simple()
33 const BYTE* const end = ip + srcSize; in HIST_count_simple()
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H A Dzstd_compress_sequences.c5 * This source code is licensed under both the BSD-style license (found in the
8 * You may select, at your option, one of the above-listed licenses.
11 /*-*************************************
17 * -log2(x / 256) lookup table for x in [0, 256).
19 * Else: Return floor(-log2(x / 256) * 256)
21 static unsigned const kInverseProbabilityLog256[256] = {
32 279, 276, 273, 270, 267, 264, 261, 258, 256, 253, 250, 247,
54 * Returns true if we should use ncount=-1 else we should
73 BYTE wksp[FSE_NCOUNTBOUND]; in ZSTD_NCountCost()
91 unsigned norm = (unsigned)((256 * count[s]) / total); in ZSTD_entropyCost()
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/linux/Documentation/devicetree/bindings/mtd/
H A Dfsmc-nand.txt5 - compatible : "st,spear600-fsmc-nand", "stericsson,fsmc-nand"
6 - reg : Address range of the mtd chip
7 - reg-names: Should contain the reg names "fsmc_regs", "nand_data", "nand_addr" and "nand_cmd"
10 - bank-width : Width (in bytes) of the device. If not present, the width
11 defaults to 1 byte
12 - nand-skip-bbtscan: Indicates the BBT scanning should be skipped
13 - timings: array of 6 bytes for NAND timings. The meanings of these bytes
15 byte 0 TCLR : CLE to RE delay in number of AHB clock cycles, only 4 bits
18 byte 1 TAR : ALE to RE delay, 4 bits are valid. Same format as TCLR.
19 byte 2 THIZ : number of HCLK clock cycles during which the data bus is
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/linux/drivers/gpu/drm/radeon/
H A Dradeon_acpi.h33 * ARG1: (ACPI_BUFFER) parameter buffer, 256 bytes
34 * OUTPUT: (ACPI_BUFFER) output buffer, 256 bytes
47 * ARG1: (ACPI_BUFFER) parameter buffer, 256 bytes
48 * OUTPUT: (ACPI_BUFFER) output buffer, 256 bytes
61 * ARG1: (ACPI_BUFFER) parameter buffer, 256 bytes
62 * OUTPUT: (ACPI_BUFFER) output buffer, 256 bytes
71 * WORD - structure size in bytes (includes size field)
72 * WORD - version
73 * DWORD - supported notifications mask
74 * DWORD - supported functions bit vector
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/linux/drivers/gpu/drm/amd/include/
H A Damd_acpi.h48 u8 thermal_state; /* thermal state: state id (0: exit state, non-0: state) */
52 u8 backlight_level; /* panel backlight level (0-255) */
64 u8 ipnut_signal; /* input signal in range 0-255 */
73 u8 min_input_signal; /* max input signal in range 0-255 */
74 u8 max_input_signal; /* min input signal in range 0-255 */
94 u16 client_id; /* client id (bit 2-0: func num, 7-3: dev num, 15-8: bus num) */
108 u16 dgpu_id; /* client id (bit 2-0: func num, 7-3: dev num, 15-8: bus num) */
116 * ARG1: (ACPI_BUFFER) parameter buffer, 256 bytes
117 * OUTPUT: (ACPI_BUFFER) output buffer, 256 bytes
130 * ARG1: (ACPI_BUFFER) parameter buffer, 256 bytes
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/linux/drivers/net/wireless/intel/iwlwifi/
H A Diwl-fh.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2005-2014, 2018-2021, 2023-2024 Intel Corporation
4 * Copyright (C) 2015-2017 Intel Deutschland GmbH
12 #include "iwl-trans.h"
28 * Keep-Warm (KW) buffer base address.
31 * host DRAM powered on (via dummy accesses to DRAM) to maintain low-latency
33 * from going into a power-savings mode that would cause higher DRAM latency,
34 * and possible data over/under-runs, before all Tx/Rx is complete.
38 * automatically invokes keep-warm accesses when normal accesses might not
42 * 31-0: Keep-warm buffer physical base address [35:4], must be 4K aligned
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/linux/lib/crypto/
H A Dgf128mul.c1 /* gf128mul.c - GF(2^128) multiplication functions
17 ---------------------------------------------------------------------------
44 ---------------------------------------------------------------------------
92 * Given a value i in 0..255 as the byte overflow when a field element
94 * 16-bit value that must be XOR-ed into the low-degree end of the
98 * the "be" convention where the highest-order bit is the coefficient of
99 * the highest-degree polynomial term, and one for the "le" convention
100 * where the highest-order bit is the coefficient of the lowest-degree
101 * polynomial term. In both cases the values are stored in CPU byte
107 * Therefore, provided that the appropriate byte endianness conversions
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/linux/arch/sparc/lib/
H A DM7memset.S15 * Fast assembler language version of the following C-program for memset
16 * which represents the `standard' for the C-library.
25 * } while (--n != 0);
34 * For less than 32 bytes stores, align the address on 4 byte boundary.
35 * Then store as many 4-byte chunks, followed by trailing bytes.
37 * For sizes greater than 32 bytes, align the address on 8 byte boundary.
39 * store 8-bytes chunks to align the address on 64 byte boundary
42 * 64-byte cache line to zero which will also clear the
49 * In the main loop, continue pre-setting the first long
56 * store remaining data in 64-byte chunks until less than
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/linux/drivers/net/ethernet/pasemi/
H A Dpasemi_mac_ethtool.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2006-2008 PA Semi, Inc
19 { "rx-drops" },
20 { "rx-bytes" },
21 { "rx-packets" },
22 { "rx-broadcast-packets" },
23 { "rx-multicast-packets" },
24 { "rx-crc-errors" },
25 { "rx-undersize-errors" },
26 { "rx-oversize-errors" },
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/linux/drivers/scsi/qedi/
H A Dqedi_nvm_iscsi_cfg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
13 #define NUM_OF_ISCSI_PF_SUPPORTED 4 /* One PF per Port -
17 #define NVM_ISCSI_CFG_DHCP_NAME_MAX_LEN 256
21 u8 byte[NVM_ISCSI_CFG_DHCP_NAME_MAX_LEN]; member
27 u8 byte[NVM_ISCSI_IPV4_ADDR_BYTE_LEN]; member
33 u8 byte[NVM_ISCSI_IPV6_ADDR_BYTE_LEN]; member
74 #define NVM_ISCSI_CFG_ISCSI_NAME_MAX_LEN 256
77 u8 byte[NVM_ISCSI_CFG_ISCSI_NAME_MAX_LEN]; member
80 #define NVM_ISCSI_CFG_CHAP_NAME_MAX_LEN 256
83 u8 byte[NVM_ISCSI_CFG_CHAP_NAME_MAX_LEN]; member
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/linux/arch/powerpc/crypto/
H A Dghashp10-ppc.pl2 # SPDX-License-Identifier: GPL-2.0
26 # version is ~2.1x slower than hardware-assisted AES-128-CTR, ~12x
27 # faster than "4-bit" integer-only compiler-generated 64-bit code.
48 ( $xlate="${dir}ppc-xlate.pl" and -f $xlate ) or
49 ( $xlate="${dir}../../perlasm/ppc-xlate.pl" and -f $xlate) or
50 die "can't locate ppc-xlate.pl";
70 mfspr $vrsave,256
72 mtspr 256,r0
79 le?vxor 5,5,6 # set a b-endian mask
82 vspltisb $xC2,-16 # 0xf0
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H A Dghashp8-ppc.pl2 # SPDX-License-Identifier: GPL-2.0
26 # version is ~2.1x slower than hardware-assisted AES-128-CTR, ~12x
27 # faster than "4-bit" integer-only compiler-generated 64-bit code.
48 ( $xlate="${dir}ppc-xlate.pl" and -f $xlate ) or
49 ( $xlate="${dir}../../perlasm/ppc-xlate.pl" and -f $xlate) or
50 die "can't locate ppc-xlate.pl";
68 mfspr $vrsave,256
70 mtspr 256,r0
77 le?vxor 5,5,6 # set a b-endian mask
80 vspltisb $xC2,-16 # 0xf0
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/linux/tools/perf/pmu-events/arch/powerpc/power10/
H A Dothers.json35 "BriefDescription": "256-bit load finished in the LD0 load execution unit."
40 "BriefDescription": "256-bit load finished in the LD1 load execution unit."
45 …8 byte boundary, octword loads that are not aligned, and a special forward progress case of a load…
50 …8 byte boundary, octword loads that are not aligned, and a special forward progress case of a load…
55 … latency of the instruction. This only includes stores that cross the 128 byte boundary. Counted a…
60 … latency of the instruction. This only includes stores that cross the 128 byte boundary. Counted a…
/linux/fs/btrfs/tests/
H A Dextent-io-tests.c1 // SPDX-License-Identifier: GPL-2.0
11 #include "btrfs-tests.h"
14 #include "../disk-io.h"
35 ret = filemap_get_folios_contig(inode->i_mapping, &index, in process_page_range()
62 #define STATE_FLAG_STR_LEN 256
66 if (state->state & EXTENT_##name) \
67 cur += scnprintf(dest + cur, STATE_FLAG_STR_LEN - cur, \
96 node = rb_first(&tree->state); in dump_extent_io_tree()
103 test_msg(" start=%llu len=%llu flags=%s", state->start, in dump_extent_io_tree()
104 state->end + 1 - state->start, flags_str); in dump_extent_io_tree()
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/linux/lib/842/
H A D842.h1 /* SPDX-License-Identifier: GPL-2.0 */
14 * to a previously-written number of data bytes to copy to the output buffer.
16 * The template code is a 5-bit value. This code indicates what to do with
33 * 4, or 8 byte value already in the output buffer, that should be copied to
37 * and 8 bits for I8. Since each index points to a 2, 4, or 8 byte section,
38 * this means that I2 can reference 512 bytes ((2^8 bits = 256) * 2 bytes), I4
40 * bytes ((2^8 = 256) * 8 bytes). Think of it as a kind-of ring buffer for
41 * each of I2, I4, and I8 that are updated for each byte written to the output
45 * bytes written to the output buffer, an I2 index of 0 would index to byte 256
46 * in the output buffer, while an I2 index of 16 would index to byte 16 in the
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/linux/arch/arm/crypto/
H A Dchacha-neon-core.S11 * ChaCha20 256-bit cipher algorithm, RFC7539, x64 SSE3 functions
26 * (c) vrev32.16 (16-bit rotations only)
30 * ChaCha has 16, 12, 8, and 7-bit rotations. For the 12 and 7-bit rotations,
31 * the only choices are (a) and (b). We use (a) since it takes two-thirds the
32 * cycles of (b) on both Cortex-A7 and Cortex-A53.
34 * For the 16-bit rotation, we use vrev32.16 since it's consistently fastest
37 * For the 8-bit rotation, we use vtbl.8 + vtbl.8. On Cortex-A7, this sequence
42 * A disadvantage is that on Cortex-A53, the vtbl sequence is the same speed as
46 * CPUs, e.g. ~4.8% faster ChaCha20 on Cortex-A7.
57 * chacha_permute - permute one block
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/linux/Documentation/virt/kvm/devices/
H A Dmpic.rst1 .. SPDX-License-Identifier: GPL-2.0
9 - KVM_DEV_TYPE_FSL_MPIC_20 Freescale MPIC v2.0
10 - KVM_DEV_TYPE_FSL_MPIC_42 Freescale MPIC v4.2
20 KVM_DEV_MPIC_BASE_ADDR (rw, 64-bit)
21 Base address of the 256 KiB MPIC register space. Must be
25 KVM_DEV_MPIC_GRP_REGISTER (rw, 32-bit)
27 "attr" is the byte offset into the MPIC register space. Accesses
28 must be 4-byte aligned.
33 KVM_DEV_MPIC_GRP_IRQ_ACTIVE (rw, 32-bit)
37 For edge-triggered interrupts: Writing 1 is considered an activating
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/linux/drivers/md/dm-vdo/indexer/
H A Dradix-sort.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "radix-sort.h"
11 #include "memory-alloc.h"
12 #include "string-utils.h"
23 /* Sort keys are pointers to immutable fixed-length arrays of bytes. */
27 * The keys are separated into piles based on the byte in each keys at the current offset, so the
28 * number of keys with each byte must be counted.
31 /* The number of non-empty bins */
33 /* The index (key byte) of the first non-empty bin */
35 /* The index (key byte) of the last non-empty bin */
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/linux/drivers/s390/block/
H A Ddasd_eckd.h1 /* SPDX-License-Identifier: GPL-2.0 */
67 * Perform Subsystem Function / Sub-Orders
100 * Out-of-space (OOS) Codes
120 * Size that is reported for large volumes in the old 16-bit no_cyl field
126 #define DASD_ECKD_RCD_DATA_SIZE 256
128 #define DASD_ECKD_PATH_THRHLD 256
135 #define DASD_ECKD_MAX_BLOCKS_RAW 256
181 unsigned long ep_sys_time; /* Ext Parameter - System Time Stamp */
182 __u8 ep_format; /* Extended Parameter format byte */
183 __u8 ep_prio; /* Extended Parameter priority I/O byte */
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/linux/lib/
H A Ddecompress_bunzip2.c20 the Burrows-Wheeler transformation. Much of that time is delay
25 non-profit hospice organization in the name of the woman I loved, who
32 Lafayette, LA 70503-3240
34 Phone (337) 232-1234 or 1-800-738-2226
35 Fax (337) 232-1297
64 #define MAX_SYMBOLS 258 /* 256 literals + RUNA + RUNB */
70 #define RETVAL_LAST_BLOCK (-1)
71 #define RETVAL_NOT_BZIP_DATA (-2)
72 #define RETVAL_UNEXPECTED_INPUT_EOF (-3)
73 #define RETVAL_UNEXPECTED_OUTPUT_EOF (-4)
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/linux/Documentation/staging/
H A Dcrc32.rst5 A CRC is a long-division remainder. You add the CRC to the message,
11 protocols put the end-of-frame flag after the CRC.
15 - We're working in binary, so the digits are only 0 and 1, and
16 - When dividing polynomials, there are no carries. Rather than add and
21 To produce a 32-bit CRC, the divisor is actually a 33-bit CRC polynomial.
24 familiar with the IEEE 754 floating-point format, it's the same idea.)
27 to decide on the endianness of the bits within each byte. To get
28 the best error-detecting properties, this should correspond to the
29 order they're actually sent. For example, standard RS-232 serial is
30 little-endian; the most significant bit (sometimes used for parity)
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/linux/drivers/infiniband/hw/hfi1/
H A Dqsfp.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
10 /* 128 byte pages, per SFF 8636 rev 2.4 */
23 /* QSFP is paged at 256 bytes */
24 #define QSFP_PAGESIZE 256
25 /* Reads/writes cannot cross 128 byte boundaries */
33 /* Byte 0 is Identifier, not checked */
34 /* Byte 1 is reserved "status MSB" */
37 #define QSFP_MONITOR_RANGE (QSFP_MONITOR_VAL_END - QSFP_MONITOR_VAL_START + 1)
43 /* Byte 128 is Identifier: must be 0x0c for QSFP, or 0x0d for QSFP+ */
46 * Byte 129 is "Extended Identifier".
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/linux/drivers/s390/crypto/
H A Dzcrypt_msgtype50.c1 // SPDX-License-Identifier: GPL-2.0+
44 * Note that all unsigned char arrays are right-justified and left-padded
67 /* Mod-Exp, with a small modulus */
77 /* Mod-Exp, with a large modulus */
82 unsigned char exponent[256];
83 unsigned char modulus[256];
84 unsigned char message[256];
87 /* Mod-Exp, with a larger modulus */
120 unsigned char message[256];
128 unsigned char p[256];
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