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/linux/arch/powerpc/lib/
H A Dfeature-fixups-test.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
6 #include <asm/feature-fixups.h>
9 #include <asm/asm-compat.h>
10 #include <asm/ppc-opcode.h>
20 or 2,2,2 /* fixup will nop out this instruction */
27 or 2,2,2
37 or 2,2,2 /* fixup will replace this with ftr_fixup_test2_alt */
44 or 2,2,2
57 or 2,2,2 /* fixup will fail to replace this */
64 or 2,2,2
[all …]
/linux/arch/m68k/lib/
H A Dchecksum.c1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de>
19 * length-counter instead of the length counter
22 * data-registers to hold input values and one tries to
43 * is aligned on either a 2-byte or 4-byte boundary. in csum_partial()
45 __asm__("movel %2,%3\n\t" in csum_partial()
47 "jeq 2f\n\t" in csum_partial()
48 "subql #2,%1\n\t" /* buff%4==2: treat first word */ in csum_partial()
50 "addql #2,%1\n\t" /* len was == 2, treat only rest */ in csum_partial()
53 "addw %2@+,%0\n\t" /* add first word to sum */ in csum_partial()
[all …]
/linux/include/dt-bindings/pinctrl/
H A Dpads-imx8dxl.h1 /* SPDX-License-Identifier: GPL-2.0+ */
12 #define IMX8DXL_PCIE_CTRL0_WAKE_B 2
15 #define IMX8DXL_USB_SS3_TC1 5
150 … IMX8DXL_PCIE_CTRL0_PERST_B_LSIO_GPIO7_IO00 IMX8DXL_PCIE_CTRL0_PERST_B 5
153 … IMX8DXL_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO7_IO01 IMX8DXL_PCIE_CTRL0_CLKREQ_B 5
156 … IMX8DXL_PCIE_CTRL0_WAKE_B_LSIO_GPIO7_IO02 IMX8DXL_PCIE_CTRL0_WAKE_B 5
159 … IMX8DXL_USB_SS3_TC0_CONN_USB_OTG2_PWR IMX8DXL_USB_SS3_TC0 2
161 … IMX8DXL_USB_SS3_TC0_LSIO_GPIO7_IO03 IMX8DXL_USB_SS3_TC0 5
165 … IMX8DXL_USB_SS3_TC1_LSIO_GPIO7_IO04 IMX8DXL_USB_SS3_TC1 5
168 … IMX8DXL_USB_SS3_TC2_CONN_USB_OTG2_OC IMX8DXL_USB_SS3_TC2 2
[all …]
/linux/arch/alpha/lib/
H A Dev6-memset.S1 /* SPDX-License-Identifier: GPL-2.0 */
3 * arch/alpha/lib/ev6-memset.S
8 * 21264 version contributed by Rick Gorton <rick.gorton@alpha-processor.com>
13 * ftp.digital.com/pub/Digital/info/semiconductor/literature/dsc-library.html
15 * E - either cluster
16 * U - upper subcluster; U0 - subcluster U0; U1 - subcluster U1
17 * L - lower subcluster; L0 - subcluster L0; L1 - subcluster L1
41 .align 5
48 * undertake a major re-write to interleave the constant materialization
49 * with other parts of the fall-through code. This is important, even
[all …]
H A Dmemmove.S1 /* SPDX-License-Identifier: GPL-2.0 */
7 * This is hand-massaged output from the original memcpy.c. We defer to
25 addq $17,$18,$5
27 cmpule $5,$16,$2 /* dest >= src + n */
29 bis $1,$2,$1
31 xor $16,$17,$2
34 and $2,7,$2 /* Test for src/dest co-alignment. */
40 bne $2,$misaligned_dn
45 lda $4,-1($4)
46 lda $5,-1($5)
[all …]
/linux/drivers/gpu/drm/i915/display/
H A Dintel_qp_tables.c1 // SPDX-License-Identifier: MIT
43 { 3, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0,
45 { 3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
47 { 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1,
49 { 5, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1,
51 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 1, 1, 1, 1, 1,
53 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
54 2, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0 },
55 { 5, 5, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2,
56 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 0, 0, 0 },
[all …]
/linux/Documentation/hwmon/
H A Ducd9200.rst11 Addresses scanned: -
15 - http://focus.ti.com/lit/ds/symlink/ucd9220.pdf
16 - http://focus.ti.com/lit/ds/symlink/ucd9222.pdf
17 - http://focus.ti.com/lit/ds/symlink/ucd9224.pdf
18 - http://focus.ti.com/lit/ds/symlink/ucd9240.pdf
19 - http://focus.ti.com/lit/ds/symlink/ucd9244.pdf
20 - http://focus.ti.com/lit/ds/symlink/ucd9246.pdf
21 - http://focus.ti.com/lit/ds/symlink/ucd9248.pdf
23 Author: Guenter Roeck <linux@roeck-us.net>
27 -----------
[all …]
/linux/drivers/clk/rockchip/
H A Dclk-rk3576.c1 // SPDX-License-Identifier: GPL-2.0
4 * Author: Elaine Zhang <zhangqing@rock-chips.com>
7 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/rockchip,rk3576-cru.h>
27 RK3588_PLL_RATE(2520000000, 2, 210, 0, 0),
28 RK3588_PLL_RATE(2496000000, 2, 208, 0, 0),
29 RK3588_PLL_RATE(2472000000, 2, 206, 0, 0),
30 RK3588_PLL_RATE(2448000000, 2, 204, 0, 0),
31 RK3588_PLL_RATE(2424000000, 2, 202, 0, 0),
32 RK3588_PLL_RATE(2400000000, 2, 200, 0, 0),
[all …]
H A Dclk-rk3588.c1 // SPDX-License-Identifier: GPL-2.0
4 * Author: Elaine Zhang <zhangqing@rock-chips.com>
7 #include <linux/clk-provider.h>
12 #include <dt-bindings/clock/rockchip,rk3588-cru.h>
24 RK3588_PLL_RATE(2520000000, 2, 210, 0, 0),
25 RK3588_PLL_RATE(2496000000, 2, 208, 0, 0),
26 RK3588_PLL_RATE(2472000000, 2, 206, 0, 0),
27 RK3588_PLL_RATE(2448000000, 2, 204, 0, 0),
28 RK3588_PLL_RATE(2424000000, 2, 202, 0, 0),
29 RK3588_PLL_RATE(2400000000, 2, 200, 0, 0),
[all …]
/linux/arch/alpha/kernel/
H A Dtraps.c1 // SPDX-License-Identifier: GPL-2.0
37 regs->pc, regs->r26, regs->ps, print_tainted()); in dik_show_regs()
38 printk("pc is at %pSR\n", (void *)regs->pc); in dik_show_regs()
39 printk("ra is at %pSR\n", (void *)regs->r26); in dik_show_regs()
41 regs->r0, regs->r1, regs->r2); in dik_show_regs()
43 regs->r3, regs->r4, regs->r5); in dik_show_regs()
45 regs->r6, regs->r7, regs->r8); in dik_show_regs()
56 regs->r16, regs->r17, regs->r18); in dik_show_regs()
58 regs->r19, regs->r20, regs->r21); in dik_show_regs()
60 regs->r22, regs->r23, regs->r24); in dik_show_regs()
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dsama7g5-pinfunc.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
8 #define PIN_PA0__FLEXCOM0_IO0 PINMUX_PIN(PIN_PA0, 2, 1)
10 #define PIN_PA0__PWML0 PINMUX_PIN(PIN_PA0, 5, 2)
14 #define PIN_PA1__FLEXCOM0_IO1 PINMUX_PIN(PIN_PA1, 2, 1)
17 #define PIN_PA1__PWMH0 PINMUX_PIN(PIN_PA1, 5, 3)
18 #define PIN_PA2 2
21 #define PIN_PA2__FLEXCOM0_IO2 PINMUX_PIN(PIN_PA2, 2, 1)
24 #define PIN_PA2__PWMH1 PINMUX_PIN(PIN_PA2, 5, 3)
29 #define PIN_PA3__FLEXCOM0_IO3 PINMUX_PIN(PIN_PA3, 2, 1)
32 #define PIN_PA3__PWML3 PINMUX_PIN(PIN_PA3, 5, 3)
[all …]
/linux/tools/arch/arm64/include/asm/
H A Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
21 * C5.2, version:ARM DDI 0487A.f)
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
36 #define Op2_shift 5
[all …]
/linux/arch/m68k/fpsp040/
H A Dtbldo.S10 | index with a 10-bit index, with the first
23 |TBLDO idnt 2,1 | Motorola 040 Floating Point Software Package
46 | instruction ;opcode-stag Notes
49 .long smovcr |$00-0 fmovecr all
50 .long smovcr |$00-1 fmovecr all
51 .long smovcr |$00-2 fmovecr all
52 .long smovcr |$00-3 fmovecr all
53 .long smovcr |$00-4 fmovecr all
54 .long smovcr |$00-5 fmovecr all
55 .long smovcr |$00-6 fmovecr all
[all …]
/linux/drivers/pinctrl/sunplus/
H A Dsppctl_sp7021.c1 // SPDX-License-Identifier: GPL-2.0
18 D_PIS(0, 0), D_PIS(0, 1), D_PIS(0, 2), D_PIS(0, 3),
19 D_PIS(0, 4), D_PIS(0, 5), D_PIS(0, 6), D_PIS(0, 7),
20 D_PIS(1, 0), D_PIS(1, 1), D_PIS(1, 2), D_PIS(1, 3),
21 D_PIS(1, 4), D_PIS(1, 5), D_PIS(1, 6), D_PIS(1, 7),
22 D_PIS(2, 0), D_PIS(2, 1), D_PIS(2, 2), D_PIS(2, 3),
23 D_PIS(2, 4), D_PIS(2, 5), D_PIS(2, 6), D_PIS(2, 7),
24 D_PIS(3, 0), D_PIS(3, 1), D_PIS(3, 2), D_PIS(3, 3),
25 D_PIS(3, 4), D_PIS(3, 5), D_PIS(3, 6), D_PIS(3, 7),
26 D_PIS(4, 0), D_PIS(4, 1), D_PIS(4, 2), D_PIS(4, 3),
[all …]
/linux/drivers/clk/renesas/
H A Dr9a09g057-cpg.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/renesas,r9a09g057-cpg.h>
15 #include "rzv2h-cpg.h"
60 {1, 2},
61 {2, 4},
67 {0, 2},
73 {0, 2},
75 {2, 8},
92 DEF_FIXED(".pllvdo", CLK_PLLVDO, CLK_QEXTAL, 105, 2),
[all …]
/linux/drivers/comedi/drivers/ni_routing/ni_device_routes/
H A Dpxie-6535.c1 // SPDX-License-Identifier: GPL-2.0+
3 * comedi/drivers/ni_routing/ni_device_routes/pxie-6535.c
6 * COMEDI - Linux Control and Measurement Device Interface
11 * the Free Software Foundation; either version 2 of the License, or
31 .device = "pxie-6535",
37 NI_PFI(2),
40 NI_PFI(5),
43 TRIGGER_LINE(2),
46 TRIGGER_LINE(5),
67 NI_PFI(2),
[all …]
/linux/drivers/edac/
H A Dpnd2_edac.h1 /* SPDX-License-Identifier: GPL-2.0-only */
56 u64 interleave_mode : 2;
64 u64 sym_slice0_channel_enabled : 2;
65 u64 sym_slice1_channel_enabled : 2;
136 u32 pad : 2;
137 u32 asym_2way_intlv_mode : 2;
139 u32 pad_16_15 : 2;
149 /* Apollo Lake d-unit */
156 u32 dwid : 2;
158 u32 rsvd13_9 : 5;
[all …]
/linux/tools/perf/pmu-events/arch/x86/tigerlake/
H A Dpipeline.json4 "Counter": "0,1,2,3,4,5,6,7",
8 "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.",
14 "Counter": "0,1,2,3,4,5,6,7",
23 "Counter": "0,1,2,3,4,5,6,7",
32 "Counter": "0,1,2,3,4,5,6,7",
40 "Counter": "0,1,2,
21 { global() object
50 { global() object
[all...]
/linux/Documentation/driver-api/media/drivers/
H A Dsh_mobile_ceu_camera.rst1 .. SPDX-License-Identifier: GPL-2.0
9 -----------
12 host scales: -"- host driver
17 ---------------------------------
19 .. code-block:: none
21 -1--
23 -2-- -\
24 | --\
25 | --\
26 +-5-- . -- -3-- -\
[all …]
/linux/drivers/pinctrl/mediatek/
H A Dpinctrl-mt7981.c1 // SPDX-License-Identifier: GPL-2.0
9 #include "pinctrl-moore.h"
41 PIN_FIELD_BASE(2, 2, 5, 0x20, 0x10, 6, 1),
43 PIN_FIELD_BASE(4, 4, 4, 0x20, 0x10, 2, 1),
44 PIN_FIELD_BASE(5, 5, 4, 0x20, 0x10, 1, 1),
49 PIN_FIELD_BASE(9, 9, 5, 0x20, 0x10, 9, 1),
50 PIN_FIELD_BASE(10, 10, 5, 0x20, 0x10, 8, 1),
51 PIN_FIELD_BASE(11, 11, 5, 0x40, 0x10, 10, 1),
52 PIN_FIELD_BASE(12, 12, 5, 0x20, 0x10, 7, 1),
53 PIN_FIELD_BASE(13, 13, 5, 0x20, 0x10, 11, 1),
[all …]
H A Dpinctrl-mtk-mt8135.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include "pinctrl-mtk-common.h"
16 MTK_EINT_FUNCTION(2, 49),
19 MTK_FUNCTION(2, "EINT49"),
22 MTK_FUNCTION(5, "PCM1_DO"),
28 MTK_EINT_FUNCTION(2, 48),
31 MTK_FUNCTION(2, "EINT48"),
34 MTK_FUNCTION(5, "PCM1_WS"),
38 MTK_PIN(PINCTRL_PIN(2, "MSDC0_DAT5"),
40 MTK_EINT_FUNCTION(2, 47),
[all …]
/linux/tools/perf/pmu-events/arch/x86/rocketlake/
H A Dpipeline.json4 "Counter": "0,1,2,3,4,5,6,7",
8 "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.",
14 "Counter": "0,1,2,3,4,5,6,7",
23 "Counter": "0,1,2,3,4,5,6,7",
32 "Counter": "0,1,2,3,4,5,6,7",
40 "Counter": "0,1,2,
21 { global() object
50 { global() object
[all...]
/linux/tools/perf/pmu-events/arch/x86/icelake/
H A Dpipeline.json4 "Counter": "0,1,2,3,4,5,6,7",
8 "PublicDescription": "Counts cycles when divide unit is busy executing divide or square root operations. Accounts for integer and floating-point operations.",
14 "Counter": "0,1,2,3,4,5,6,7",
23 "Counter": "0,1,2,3,4,5,6,7",
32 "Counter": "0,1,2,3,4,5,6,7",
40 "Counter": "0,1,2,
21 { global() object
50 { global() object
[all...]
/linux/include/linux/platform_data/
H A Dkeyboard-spear.h6 * License version 2. This program is licensed "as is" without any
22 KEY(0, 2, KEY_2), \
25 KEY(0, 5, KEY_5), \
31 KEY(1, 2, KEY_EQUAL), \
34 KEY(1, 5, KEY_Q), \
38 KEY(2, 0, KEY_T), \
39 KEY(2, 1, KEY_Y), \
40 KEY(2, 2, KEY_U), \
41 KEY(2, 3, KEY_I), \
42 KEY(2, 4, KEY_O), \
[all …]
/linux/sound/soc/codecs/
H A Dwm8741.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * wm8741.h -- WM8423 ASoC driver
38 * R0 (0x00) - DACLLSB_ATTENUATION
42 #define WM8741_UPDATELL_SHIFT 5 /* UPDATELL */
44 #define WM8741_LAT_4_0_MASK 0x001F /* LAT[4:0] - [4:0] */
45 #define WM8741_LAT_4_0_SHIFT 0 /* LAT[4:0] - [4:0] */
46 #define WM8741_LAT_4_0_WIDTH 5 /* LAT[4:0] - [4:0] */
49 * R1 (0x01) - DACLMSB_ATTENUATION
53 #define WM8741_UPDATELM_SHIFT 5 /* UPDATELM */
55 #define WM8741_LAT_9_5_0_MASK 0x001F /* LAT[9:5] - [4:0] */
[all …]

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