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/linux/Documentation/hwmon/
H A Dlochnagar.rst31 power1_average_interval Power averaging time input valid from 1 to 1708mS
33 in1_input Measured voltage for 1V8 DSP (milliVolts)
34 in1_label "1V8 DSP"
35 curr2_input Measured current for 1V8 DSP (milliAmps)
36 curr2_label "1V8 DSP"
37 power2_average Measured average power for 1V8 DSP (microWatts)
38 power2_average_interval Power averaging time input valid from 1 to 1708mS
39 power2_label "1V8 DSP"
40 in2_input Measured voltage for 1V8 CDC (milliVolts)
41 in2_label "1V8 CDC"
[all …]
/linux/arch/arm64/crypto/
H A Dsm4-ce-ccm-core.S17 .irp b, 0, 1, 8, 9, 10, 11, 12, 13, 14, 15, 16, 24, 25, 26, 27, 28, 29, 30, 31
32 mov vctr.d[1], x8; \
34 adds x8, x8, #1; \
72 sub w3, w3, #1
132 inc_le128(v8) /* +0 */
133 inc_le128(v9) /* +1 */
139 SM4_CRYPT_BLK2(v8, RMAC)
140 eor v8.16b, v8.16b, v0.16b
152 st1 {v8.16b-v11.16b}, [x1], #64
164 inc_le128(v8)
[all …]
H A Dsm4-ce-cipher-core.S6 .irp b, 0, 1, 2, 3, 4, 5, 6, 7, 8
19 ld1 {v8.4s}, [x2]
21 CPU_LE( rev32 v8.16b, v8.16b )
23 sm4e v8.4s, v0.4s
24 sm4e v8.4s, v1.4s
25 sm4e v8.4s, v2.4s
26 sm4e v8.4s, v3.4s
27 sm4e v8.4s, v4.4s
28 sm4e v8.4s, v5.4s
29 sm4e v8.4s, v6.4s
[all …]
H A Dsm4-ce-core.S17 .irp b, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \
146 sub w3, w3, #1;
195 sub w4, w4, #1
233 rev32 v8.16b, v0.16b
242 SM4_CRYPT_BLK8_BE(v8, v9, v10, v11, v12, v13, v14, v15)
244 eor v8.16b, v8.16b, RIV.16b
253 st1 {v8.16b-v11.16b}, [x1], #64
270 rev32 v8.16b, v0.16b
275 SM4_CRYPT_BLK4_BE(v8, v9, v10, v11)
277 eor v8.16b, v8.16b, RIV.16b
[all …]
H A Daes-neonbs-core.S339 \t0, \t1, \t2, \t3, \t4, \t5, \t6, \t7, 1
360 swapmove_2x \x0, \x1, \x2, \x3, 1, \t0, \t2, \t3
361 swapmove_2x \x4, \x5, \x6, \x7, 1, \t0, \t2, \t3
386 ld1 {v17.4s}, [x1], #16 // load round 1 key
388 movi v8.16b, #0x01 // bit masks
398 sub x2, x2, #1
405 cmtst v0.16b, v7.16b, v8.16b
418 subs x2, x2, #1
439 tbl v0.16b, {v10.16b}, v8.16b
441 tbl v1.16b, {v11.16b}, v8.16b
[all …]
/linux/arch/sh/boards/mach-hp6xx/
H A Dsetup.c31 [1] = {
44 .id = -1,
51 .id = -1,
57 u8 v8; in dac_audio_start() local
65 v8 = inb(PKDR); in dac_audio_start()
66 v8 &= ~PKDR_SPEAKER; in dac_audio_start()
67 outb(v8, PKDR); in dac_audio_start()
75 u8 v8; in dac_audio_stop() local
83 v8 = inb(PKDR); in dac_audio_stop()
84 v8 |= PKDR_SPEAKER; in dac_audio_stop()
[all …]
/linux/lib/crc/powerpc/
H A Dcrc-vpmsum-template.S101 vspltisw v0,-1
106 /* Get the initial value into v8 */
107 vxor v8,v8,v8
108 MTVRD(v8, R3)
110 vsldoi v8,zeroes,v8,8 /* shift into bottom 32 bits */
112 vsldoi v8,v8,zeroes,4 /* shift into top 32 bits */
127 1: lis r7,MAX_SIZE@h
148 addi r7,r7,-1
172 cmpdi r0,1
195 vxor v16,v16,v8
[all …]
/linux/Documentation/devicetree/bindings/regulator/
H A Dfixed-regulator.yaml61 maxItems: 1
64 maxItems: 1
71 maxItems: 1
78 maxItems: 1
87 maxItems: 1
111 maxItems: 1
125 reg_1v8: regulator-1v8 {
127 regulator-name = "1v8";
137 reg_1v8_clk: regulator-1v8-clk {
139 regulator-name = "1v8";
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-puma-haikou-video-demo.dtso28 cam_afvdd_2v8: regulator-cam-afvdd-2v8 {
33 regulator-name = "cam-afvdd-2v8";
37 cam_avdd_2v8: regulator-cam-avdd-2v8 {
42 regulator-name = "cam-avdd-2v8";
46 cam_dovdd_1v8: regulator-cam-dovdd-1v8 {
51 regulator-name = "cam-dovdd-1v8";
55 cam_dvdd_1v2: regulator-cam-dvdd-1v2 {
61 regulator-name = "cam-dvdd-1v2";
98 #address-cells = <1>;
111 reset-gpios = <&pca9670 1 GPIO_ACTIVE_HIGH>;
[all …]
/linux/arch/powerpc/lib/
H A Dmemcpy_power7.S11 /* 0 == don't use VMX, 1 == use VMX */
42 bf cr7*4+3,1f
44 addi r4,r4,1
46 addi r3,r3,1
48 1: bf cr7*4+2,2f
54 2: bf cr7*4+1,3f
136 6: bf cr7*4+1,7f
191 12: bf cr7*4+1,13f
232 * 1 for the store side.
236 ori r9,r9,1 /* stream=1 */
[all …]
H A Dcopyuser_power7.S91 bf cr7*4+3,1f
93 addi r4,r4,1
95 addi r3,r3,1
97 1: bf cr7*4+2,2f
103 2: bf cr7*4+1,3f
185 6: bf cr7*4+1,7f
240 12: bf cr7*4+1,13f
270 * 1 for the store side.
274 ori r9,r9,1 /* stream=1 */
278 ble 1f
[all …]
H A Dmemcmp_64.S73 * 16 bytes boundary and permute the result with the 1st 16 bytes.
75 * | y y y y y y y y y y y y y 0 1 2 | 3 4 5 6 7 8 9 a b c d e f z z z |
83 * _v1st_qw is the 1st aligned QW of current addr which is already loaded.
96 * 1) src/dst has the same offset to the 8 bytes boundary. The handlers
120 1: lbz rA,0(r3)
126 lbz rA,1(r3)
127 lbz rB,1(r4)
146 bdnz 1b
193 /* compare 1 ~ 31 bytes, at least r3 addr is 8 bytes aligned now */
310 1: LD rA,0,r3
[all …]
/linux/tools/testing/selftests/powerpc/copyloops/
H A Dmemcpy_power7.S11 /* 0 == don't use VMX, 1 == use VMX */
42 bf cr7*4+3,1f
44 addi r4,r4,1
46 addi r3,r3,1
48 1: bf cr7*4+2,2f
54 2: bf cr7*4+1,3f
136 6: bf cr7*4+1,7f
191 12: bf cr7*4+1,13f
232 * 1 for the store side.
236 ori r9,r9,1 /* stream=1 */
[all …]
H A Dcopyuser_power7.S91 bf cr7*4+3,1f
93 addi r4,r4,1
95 addi r3,r3,1
97 1: bf cr7*4+2,2f
103 2: bf cr7*4+1,3f
185 6: bf cr7*4+1,7f
240 12: bf cr7*4+1,13f
270 * 1 for the store side.
274 ori r9,r9,1 /* stream=1 */
[all...]
/linux/arch/sparc/math-emu/
H A Dmath_32.c31 * These are defined in the third layer of macros: op-1.h, op-2.h
33 * of 1,2 and 4 machine words respectively. [For example, on sparc64
35 * constructs in op-1.h, but on sparc32 they use op-2.h definitions.]
47 * SPARC architecture manual V9, and what I really want is V8...
50 * has to be emulated on V8). So I think I'm going to have
86 #define FSQRTQ 0x02b /* v8 */
87 #define FADDQ 0x043 /* v8 */
88 #define FSUBQ 0x047 /* v8 */
89 #define FMULQ 0x04b /* v8 */
90 #define FDIVQ 0x04f /* v8 */
[all …]
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp.h34 #include "phy-qcom-qmp-qserdes-com-v8.h"
35 #include "phy-qcom-qmp-usb43-qserdes-com-v8.h"
36 #include "phy-qcom-qmp-qserdes-txrx-v8.h"
37 #include "phy-qcom-qmp-qserdes-lalb-v8.h"
67 #include "phy-qcom-qmp-pcs-v8.h"
79 #define REFCLK_DRV_DSBL BIT(1) /* PCIe */
83 #define PCS_START BIT(1)
91 #define ALFPS_DTCT_EN BIT(1)
/linux/drivers/net/wireless/intel/iwlwifi/mld/
H A Dregulatory.c98 /* Only set to South Korea if the table revision is 1 */ in iwl_mld_geo_sar_init()
99 u8 sk = mld->fwrt.geo_rev == 1 ? 1 : 0; in iwl_mld_geo_sar_init()
161 WARN_ONCE(1, "Bad version for REDUCE_TX_POWER_CMD: %d\n", in iwl_mld_config_sar_profile()
182 int chain_a_prof = 1; in iwl_mld_init_sar()
183 int chain_b_prof = 1; in iwl_mld_init_sar()
186 /* If no profile was chosen by the user yet, choose profile 1 (WRDS) as in iwl_mld_init_sar()
232 /* v7 and v8 have the same layout for the ppag_config_info */ in iwl_mld_ppag_send_cmd()
233 .v8.ppag_config_info.hdr.table_source = fwrt->ppag_bios_source, in iwl_mld_ppag_send_cmd()
234 .v8.ppag_config_info.hdr.table_revision = fwrt->ppag_bios_rev, in iwl_mld_ppag_send_cmd()
235 .v8.ppag_config_info.value = cpu_to_le32(fwrt->ppag_flags), in iwl_mld_ppag_send_cmd()
[all …]
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi6220-coresight.dtsi78 #address-cells = <1>;
89 port@1 {
90 reg = <1>;
147 #address-cells = <1>;
158 port@1 {
159 reg = <1>;
380 compatible = "arm,coresight-cti-v8-arch",
391 /* CTI - CPU-1 */
393 compatible = "arm,coresight-cti-v8-arch",
406 compatible = "arm,coresight-cti-v8-arch",
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad4030.yaml40 maxItems: 1
50 const: 1
57 vdd-1v8-supply: true
80 maxItems: 1
85 maxItems: 1
96 maxItems: 1
103 maxItems: 1
112 - vdd-1v8-supply
134 maxItems: 1
157 #address-cells = <1>;
[all …]
/linux/lib/raid/raid6/riscv/
H A Drvv.c27 p = dptr[z0 + 1]; /* XOR parity */ in raid6_rvv1_gen_syndrome_real()
40 for (d = 0; d < bytes; d += nsize * 1) { in raid6_rvv1_gen_syndrome_real()
51 for (z = z0 - 1 ; z >= 0 ; z--) { in raid6_rvv1_gen_syndrome_real()
64 "vsll.vi v3, v1, 1\n" in raid6_rvv1_gen_syndrome_real()
103 q = dptr[disks - 1]; /* RS syndrome */ in raid6_rvv1_xor_syndrome_real()
115 for (d = 0 ; d < bytes ; d += nsize * 1) { in raid6_rvv1_xor_syndrome_real()
127 for (z = z0 - 1; z >= start; z--) { in raid6_rvv1_xor_syndrome_real()
140 "vsll.vi v3, v1, 1\n" in raid6_rvv1_xor_syndrome_real()
154 for (z = start - 1; z >= 0; z--) { in raid6_rvv1_xor_syndrome_real()
164 "vsll.vi v3, v1, 1\n" in raid6_rvv1_xor_syndrome_real()
[all …]
/linux/tools/testing/selftests/powerpc/stringloops/
H A Dmemcmp_64.S73 * 16 bytes boundary and permute the result with the 1st 16 bytes.
75 * | y y y y y y y y y y y y y 0 1 2 | 3 4 5 6 7 8 9 a b c d e f z z z |
83 * _v1st_qw is the 1st aligned QW of current addr which is already loaded.
96 * 1) src/dst has the same offset to the 8 bytes boundary. The handlers
120 1: lbz rA,0(r3)
126 lbz rA,1(r3)
127 lbz rB,1(r4)
146 bdnz 1b
193 /* compare 1 ~ 31 bytes, at least r3 addr is 8 bytes aligned now */
310 1: LD rA,0,r3
[all …]
/linux/arch/arm64/boot/dts/amlogic/
H A Damlogic-c3-c308l-aw419.dts80 vddao_1v8: regulator-vddao-1v8 {
110 vcc_1v8: regulator-vcc-1v8 {
120 vdd_1v8: regulator-vdd-1v8 {
151 camera_vdddo_1v8: regulator-camera-1v8 {
171 camera_vddd_1v2: regulator-camera-1v2 {
188 #address-cells = <1>;
196 #address-cells = <1>;
197 #size-cells = <1>;
230 #address-cells = <1>;
246 #address-cells = <1>;
[all …]
H A Damlogic-c3-c302x-aw409.dts79 vddao_1v8: regulator-vddao-1v8 {
109 vcc_1v8: regulator-vcc-1v8 {
119 vdd_1v8: regulator-vdd-1v8 {
157 #address-cells = <1>;
165 #address-cells = <1>;
166 #size-cells = <1>;
199 #address-cells = <1>;
215 #address-cells = <1>;
216 #size-cells = <1>;
249 pinctrl-1 = <&sdcard_clk_gate_pins>;
/linux/lib/crypto/riscv/
H A Dchacha-riscv64-zvkb.S21 // 1. Redistributions of source code must retain the above copyright
194 vmv.v.x v8, KEY4
212 chacha_round v0, v4, v8, v12, v1, v5, v9, v13, \
216 v2, v7, v8, v13, v3, v4, v9, v14
248 vadd.vx v8, v8, KEY4
260 vxor.vv v24, v24, v8
/linux/include/linux/platform_data/
H A Dnet-cw1200.h18 bool enable); /* Control 3v3 / 1v8 supply */
33 bool enable); /* Control 3v3 / 1v8 supply */

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