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/linux/arch/arm/boot/dts/broadcom/
H A Dbcm21664.dtsi10 #address-cells = <1>;
19 cpu1: cpu@1 {
24 reg = <1>;
30 gic: interrupt-controller@1c01000 {
39 L2: cache-controller@1c20000 {
/linux/Documentation/devicetree/bindings/arm/sunxi/
H A Dallwinner,sun4i-a10-mbus.yaml25 const: 1
48 minItems: 1
54 minItems: 1
60 minItems: 1
67 minItems: 1
74 maxItems: 1
123 maxItems: 1
126 maxItems: 1
129 maxItems: 1
132 maxItems: 1
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr9a09g057.dtsi26 * 1.7/1.6/1.5/1.1 GHz based on the BOOTPLLCA_0/1 pins (and additionally can be
57 #address-cells = <1>;
141 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
213 "int-ca55-0", "int-ca55-1",
243 #reset-cells = <1>;
305 ostm5: timer@12c01000 {
412 #address-cells = <1>;
433 #address-cells = <1>;
454 #address-cells = <1>;
475 #address-cells = <1>;
[all …]
/linux/arch/arm/boot/dts/hisilicon/
H A Dhip04.dtsi26 #address-cells = <1>;
92 CPU1: cpu@1 {
95 reg = <1>;
172 interrupts = <1 13 0xf08>,
173 <1 14 0xf08>,
174 <1 11 0xf08>,
175 <1 10 0xf08>;
198 #address-cells = <1>;
199 #size-cells = <1>;
204 gic: interrupt-controller@c01000 {
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsun5i.dtsi51 #address-cells = <1>;
52 #size-cells = <1>;
55 #address-cells = <1>;
67 #address-cells = <1>;
68 #size-cells = <1>;
92 #address-cells = <1>;
93 #size-cells = <1>;
112 #address-cells = <1>;
113 #size-cells = <1>;
128 #address-cells = <1>;
[all …]