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/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,mdp5.yaml42 maxItems: 1
49 maxItems: 1
74 minItems: 1
81 minItems: 1
92 maxItems: 1
128 display-controller@1a01000 {
146 #address-cells = <1>;
/linux/arch/arm/boot/dts/hisilicon/
H A Dhi3620.dtsi14 #address-cells = <1>;
15 #size-cells = <1>;
33 #address-cells = <1>;
44 cpu@1 {
47 reg = <1>;
68 #address-cells = <1>;
69 #size-cells = <1>;
93 #address-cells = <1>;
94 #size-cells = <1>;
105 #clock-cells = <1>;
[all …]
/linux/arch/arm64/boot/dts/exynos/
H A Dexynos850.dtsi21 #size-cells = <1>;
56 #address-cells = <1>;
99 cpu1: cpu@1 {
162 #address-cells = <1>;
163 #size-cells = <1>;
196 #dma-cells = <1>;
201 gic: interrupt-controller@12a01000 {
245 samsung,cluster-index = <1>;
252 #clock-cells = <1>;
264 #clock-cells = <1>;
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsun9i-a80.dtsi64 #address-cells = <1>;
76 cpu1: cpu@1 {
151 #address-cells = <1>;
152 #size-cells = <1>;
185 clock-div = <1>;
186 clock-mult = <1>;
234 clock-div = <1>;
235 clock-mult = <1>;
251 #clock-cells = <1>;
253 clock-indices = <0>, <1>,
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8917.dtsi31 #address-cells = <1>;
165 #reset-cells = <1>;
230 #clock-cells = <1>;
237 #power-domain-cells = <1>;
313 qcom,client-id = <1>;
363 #qcom,smem-state-cells = <1>;
383 qcom,remote-pid = <1>;
388 #qcom,smem-state-cells = <1>;
413 #qcom,smem-state-cells = <1>;
427 #address-cells = <1>;
[all …]
H A Dmsm8976.dtsi32 #address-cells = <1>;
46 cpu1: cpu@1 {
174 big_cpu_sleep_0: cpu-sleep-1-0 {
183 big_cpu_sleep_1: cpu-sleep-1-1 {
214 #reset-cells = <1>;
258 #clock-cells = <1>;
263 #power-domain-cells = <1>;
380 #qcom,smem-state-cells = <1>;
397 qcom,remote-pid = <1>;
403 #qcom,smem-state-cells = <1>;
[all …]