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/linux/net/ceph/
H A Dmessenger_v2.c29 #define FRAME_TAG_HELLO 1
54 #define IN_S_HANDLE_PREAMBLE 1
65 #define OUT_S_QUEUE_DATA 1
97 return 1; in do_recvmsg()
104 * 1 - done, nothing (else) to read
113 iov_iter_is_discard(&con->v2.in_iter) ? "discard" : "need", in ceph_tcp_recv()
114 iov_iter_count(&con->v2.in_iter)); in ceph_tcp_recv()
115 ret = do_recvmsg(con->sock, &con->v2.in_iter); in ceph_tcp_recv()
117 iov_iter_count(&con->v2.in_iter)); in ceph_tcp_recv()
139 return 1; in do_sendmsg()
[all …]
/linux/tools/testing/selftests/powerpc/math/
H A Dvmx_asm.S9 # Should be safe from C, only touches r4, r5 and v0,v1,v2
13 li r3,1 # assume a bad result
17 vmr v2,v1
22 vand v2,v2,v1
27 vand v2,v2,v1
32 vand v2,v2,v1
37 vand v2,v2,v1
42 vand v2,v2,v1
47 vand v2,v2,v1
52 vand v2,v2,v1
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/linux/arch/s390/include/asm/
H A Dfpu-insn-asm.h34 \opd = 1
98 \opd = 1
100 .ifc \vxr,%v2
201 * @v2: Vector register designated operand whose MSB is stored in
202 * RXB bit 1 (instruction bit 37) and whose remaining bits
211 * Note: In most vector instruction formats [1] V1, V2, V3, and V4 directly
212 * correspond to @v1, @v2, @v3, and @v4. But there are exceptions, such as but
216 * [1] IBM z/Architecture Principles of Operation, chapter "Program
219 .macro RXB rxb v1 v2=0 v3=0 v4=0
224 .if \v2 & 0x10
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/linux/lib/raid6/
H A Drvv.c26 p = dptr[z0 + 1]; /* XOR parity */ in raid6_rvv1_gen_syndrome_real()
38 /* v0:wp0, v1:wq0, v2:wd0/w20, v3:w10 */ in raid6_rvv1_gen_syndrome_real()
39 for (d = 0; d < bytes; d += nsize * 1) { in raid6_rvv1_gen_syndrome_real()
50 for (z = z0 - 1 ; z >= 0 ; z--) { in raid6_rvv1_gen_syndrome_real()
62 "vsra.vi v2, v1, 7\n" in raid6_rvv1_gen_syndrome_real()
63 "vsll.vi v3, v1, 1\n" in raid6_rvv1_gen_syndrome_real()
64 "vand.vx v2, v2, %[x1d]\n" in raid6_rvv1_gen_syndrome_real()
65 "vxor.vv v3, v3, v2\n" in raid6_rvv1_gen_syndrome_real()
66 "vle8.v v2, (%[wd0])\n" in raid6_rvv1_gen_syndrome_real()
67 "vxor.vv v1, v3, v2\n" in raid6_rvv1_gen_syndrome_real()
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/linux/include/uapi/linux/
H A Dnfs.h22 #define NFS_FIFO_DEV (-1)
33 #define NFS_MNT_VERSION 1
43 * Error codes that have a `--' in the v2 column are not part of the
47 NFS_OK = 0, /* v2 v3 v4 */
48 NFSERR_PERM = 1, /* v2 v3 v4 */
49 NFSERR_NOENT = 2, /* v2 v3 v4 */
50 NFSERR_IO = 5, /* v2 v3 v4 */
51 NFSERR_NXIO = 6, /* v2 v3 v4 */
52 NFSERR_ACCES = 13, /* v2 v3 v4 */
53 NFSERR_EXIST = 17, /* v2 v3 v4 */
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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,saw2.yaml31 - qcom,sdm660-gold-saw2-v4.1-l2
32 - qcom,sdm660-silver-saw2-v4.1-l2
33 - qcom,msm8998-gold-saw2-v4.1-l2
34 - qcom,msm8998-silver-saw2-v4.1-l2
38 - qcom,msm8226-saw2-v2.1-cpu
39 - qcom,msm8226-saw2-v2.1-l2
41 - qcom,msm8974-saw2-v2.1-cpu
42 - qcom,msm8974-saw2-v2.1-l2
43 - qcom,msm8976-gold-saw2-v2.3-l2
44 - qcom,msm8976-silver-saw2-v2.3-l2
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/linux/arch/arm64/crypto/
H A Dsm4-ce-core.S17 .irp b, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \
63 sm4ekey v2.4s, v1.4s, v26.4s;
64 sm4ekey v3.4s, v2.4s, v27.4s;
81 tbl v21.16b, {v2.16b}, v24.16b
124 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7);
140 SM4_CRYPT_BLK4(v0, v1, v2, v3);
146 sub w3, w3, #1;
183 eor v2.16b, v2.16b, v1.16b
184 SM4_CRYPT_BLK(v2)
185 eor v3.16b, v3.16b, v2.16b
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H A Daes-ce-ccm-core.S37 tbz \nr, #1, .L\@
57 add x8, x8, #1
59 ins v1.d[1], x9 /* no carry in lower ctr */
65 ld1 {v2.16b}, [x1], #16 /* load next input block */
66 .if \enc == 1
67 eor v2.16b, v2.16b, v5.16b /* final round enc+mac */
68 eor v6.16b, v1.16b, v2.16b /* xor with crypted ctr */
70 eor v2.16b, v2.16b, v1.16b /* xor with crypted ctr */
71 eor v6.16b, v2.16b, v5.16b /* final round enc */
73 eor v0.16b, v0.16b, v2.16b /* xor mac with pt ^ rk[last] */
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H A Dsm4-neon-core.S135 subs x6, x6, #1; \
138 ROUND4(1, b1, b2, b3, b0); \
203 /* RTMP0/1 ^= x ^ rol32(x, 24) ^ rol32(RX, 2) */ \
216 /* s0/t0 ^= RTMP0/1 */ \
233 subs x6, x6, #1; \
236 ROUND8(1, b1, b2, b3, b0, b5, b6, b7, b4); \
276 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7)
293 SM4_CRYPT_BLK4(v0, v1, v2, v3)
305 ld1 {v2.16b}, [x2], #16
308 transpose_4x4(v0, v1, v2, v3)
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H A Daes-neonbs-core.S339 \t0, \t1, \t2, \t3, \t4, \t5, \t6, \t7, 1
360 swapmove_2x \x0, \x1, \x2, \x3, 1, \t0, \t2, \t3
361 swapmove_2x \x4, \x5, \x6, \x7, 1, \t0, \t2, \t3
386 ld1 {v17.4s}, [x1], #16 // load round 1 key
398 sub x2, x2, #1
407 cmtst v2.16b, v7.16b, v10.16b
418 subs x2, x2, #1
440 eor v12.16b, v2.16b, v9.16b
443 tbl v2.16b, {v12.16b}, v8.16b
454 bitslice v0, v1, v2, v3, v4, v5, v6, v7, v8, v9, v10, v11
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/linux/Documentation/arch/powerpc/
H A Disa-versions.rst12 Power10 Power ISA v3.1
14 Power8 Power ISA v2.07
15 e6500 Power ISA v2.06 with some exceptions
16 e5500 Power ISA v2.06 with some exceptions, no Altivec
17 Power7 Power ISA v2.06
18 Power6 Power ISA v2.05
19 PA6T Power ISA v2.04
20 Cell PPU - Power ISA v2.02 with some minor exceptions
22 Power5++ Power ISA v2.04 (no VMX)
23 Power5+ Power ISA v2.03
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/linux/lib/crc/powerpc/
H A Dcrc-vpmsum-template.S101 vspltisw v0,-1
127 1: lis r7,MAX_SIZE@h
148 addi r7,r7,-1
159 vxor v2,v2,v2
172 cmpdi r0,1
268 vxor v2,v2,v10
321 vxor v2,v2,v10
349 vxor v2,v2,v10
365 vsldoi v2,v2,zeroes,4
395 vxor v18,v2,v10
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/linux/Documentation/devicetree/bindings/cpufreq/
H A Dqcom-cpufreq-nvmem.yaml51 - operating-points-v2-krait-cpu
52 - operating-points-v2-kryo-cpu
54 $ref: /schemas/opp/opp-v2-kryo-cpu.yaml#
59 const: operating-points-v2-qcom-level
61 $ref: /schemas/opp/opp-v2-qcom-level.yaml#
84 maxItems: 1
99 const: operating-points-v2-kryo-cpu
117 #address-cells = <1>;
129 operating-points-v2 = <&cpu_opp_table>;
143 operating-points-v2 = <&cpu_opp_table>;
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/linux/Documentation/devicetree/bindings/hwmon/
H A Dltc2990.txt13 0: V1, V2, TR2
14 1: V1-V2, TR2
15 2: V1-V2, V3, V4
19 6: V1-V2, V3-V4
20 7: V1, V2, V3, V4
26 1: TR1, V1 or V1-V2 only per mode
35 lltc,meas-mode = <7 3>; /* V1, V2, V3, V4 */
/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v2-kryo-cpu.yaml4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
13 - $ref: opp-v2-base.yaml#
25 operating-points-v2 table when it is parsed by the OPP framework.
30 - operating-points-v2-krait-cpu
31 - operating-points-v2-kryo-cpu
59 1: MSM8996, speedbin 1
67 5: MSM8996SG, speedbin 1
73 1: IPQ8064/IPQ8066/IPQ8068
123 operating-points-v2 = <&cluster0_opp>;
135 CPU1: cpu@1 {
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/linux/lib/
H A Dxxhash.c56 # define XXH_CPU_LITTLE_ENDIAN 1
96 uint32_t v2 = seed + PRIME32_2; in xxh32() local
103 v2 = xxh32_round(v2, get_unaligned_le32(p)); in xxh32()
111 h32 = xxh_rotl32(v1, 1) + xxh_rotl32(v2, 7) + in xxh32()
166 uint64_t v2 = seed + PRIME64_2; in xxh64() local
173 v2 = xxh64_round(v2, get_unaligned_le64(p)); in xxh64()
181 h64 = xxh_rotl64(v1, 1) + xxh_rotl64(v2, 7) + in xxh64()
184 h64 = xxh64_merge_round(h64, v2); in xxh64()
234 state.v2 = seed + PRIME64_2; in xxh64_reset()
265 state->v2 = xxh64_round(state->v2, get_unaligned_le64(p64)); in xxh64_update()
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos4210.dtsi35 operating-points-v2 = <&bus_acp_opp_table>;
39 compatible = "operating-points-v2";
58 operating-points-v2 = <&bus_display_opp_table>;
62 compatible = "operating-points-v2";
81 operating-points-v2 = <&bus_dmc_opp_table>;
85 compatible = "operating-points-v2";
108 operating-points-v2 = <&bus_fsys_opp_table>;
112 compatible = "operating-points-v2";
128 operating-points-v2 = <&bus_leftbus_opp_table>;
136 operating-points-v2 = <&bus_leftbus_opp_table>;
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/linux/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_reg.h62 REG_SET_N(reg_name, 1, initial_val, \
65 #define REG_SET_2(reg, init_value, f1, v1, f2, v2) \ argument
68 FN(reg, f2), v2)
70 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ argument
73 FN(reg, f2), v2, \
76 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ argument
79 FN(reg, f2), v2, \
89 REG_UPDATE_N(reg_name, 1, \
92 #define REG_UPDATE_2(reg, f1, v1, f2, v2) \ argument
95 FN(reg, f2), v2)
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/linux/Documentation/userspace-api/gpio/
H A Dchardev.rst7 This is latest version (v2) of the character device API, as defined in
28 The API is based around two major objects, the :ref:`gpio-v2-chip` and the
29 :ref:`gpio-v2-line-request`.
31 .. _gpio-v2-chip:
41 ``offset`` in the range from 0 to ``chip.lines - 1``, i.e. `[0,chip.lines)`.
43 Lines are requested from the chip using gpio-v2-get-line-ioctl.rst
58 Get Line <gpio-v2-get-line-ioctl>
60 Get Line Info <gpio-v2-get-lineinfo-ioctl>
61 Watch Line Info <gpio-v2-get-lineinfo-watch-ioctl>
63 Read Line Info Changed Events <gpio-v2-lineinfo-changed-read>
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/linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_standalone_libraries/
H A Dlib_float_math.c69 double math_max3(double v1, double v2, double v3) in math_max3() argument
71 return v3 > math_max2(v1, v2) ? v3 : math_max2(v1, v2); in math_max3()
74 double math_max4(double v1, double v2, double v3, double v4) in math_max4() argument
76 return v4 > math_max3(v1, v2, v3) ? v4 : math_max3(v1, v2, v3); in math_max4()
79 double math_max5(double v1, double v2, double v3, double v4, double v5) in math_max5() argument
81 return math_max3(v1, v2, v3) > math_max2(v4, v5) ? math_max3(v1, v2, v3) : math_max2(v4, v5); in math_max5()
88 return 1; in math_pow()
135 while (a > 1) { in math_log2_approx()
136 a = a >> 1; in math_log2_approx()
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dcwsr_trap_handler_gfx10.asm49 #define SINGLE_STEP_MISSED_WORKAROUND 1 //workaround for lost MODE.DEBUG_EN exception when SAVECTX …
51 #define S_COHERENCE glc:1
52 #define V_COHERENCE slc:1 glc:1
60 var SQ_WAVE_IB_STS2_WAVE64_SIZE = 1
382 …s_setreg_b32 hwreg(S_TRAPSTS_HWREG, S_TRAPSTS_SAVE_CONTEXT_SHIFT, 1), s_save_tmp //clear saveCtx b…
401 // sleep 1 (64clk) is not enough for 8 waves per SIMD, which will cause
494 s_and_b32 m0, m0, 1
495 s_cmp_eq_u32 m0, 1
521 buffer_store_dword v2, v0, s_save_buf_rsrc0, s_save_mem_offset V_COHERENCE offset:128*2
544 buffer_store_dword v2, v0, s_save_buf_rsrc0, s_save_mem_offset V_COHERENCE offset:256*2
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/linux/arch/powerpc/boot/dts/fsl/
H A Dqoriq-fman-1.dtsi36 #address-cells = <1>;
37 #size-cells = <1>;
38 cell-index = <1>;
42 interrupts = <97 2 0 0>, <16 2 1 0>;
43 clocks = <&clockgen 3 1>;
55 compatible = "fsl,fman-v2-port-oh";
61 compatible = "fsl,fman-v2-port-oh";
67 compatible = "fsl,fman-v2-port-oh";
73 compatible = "fsl,fman-v2-port-oh";
79 compatible = "fsl,fman-v2-port-oh";
[all …]
/linux/Documentation/devicetree/bindings/scsi/
H A Dhisilicon-sas.txt8 (b) "hisilicon,hip06-sas-v2" for v2 hw in hip06 chipset
9 (c) "hisilicon,hip07-sas-v2" for v2 hw in hip07 chipset
32 Completion queue interrupts : each completion queue has 1
38 For v2 hw: Interrupts for phys, Sata, and completion queues;
46 Sata interrupts : Each phy on the controller has 1 Sata
49 Completion queue interrupts : each completion queue has 1
54 - hip06-sas-v2-quirk-amt : when set, indicates that the v2 controller has the
85 <336 1>,<337 1>,<338 1>,/* cq0-2 */
86 <339 1>,<340 1>,<341 1>,/* cq3-5 */
87 <342 1>,<343 1>,<344 1>,/* cq6-8 */
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/linux/Documentation/devicetree/bindings/dma/
H A Dmarvell,xor-v2.yaml4 $id: http://devicetree.org/schemas/dma/marvell,xor-v2.yaml#
7 title: Marvell XOR v2 engines
15 - const: marvell,xor-v2
19 - const: marvell,xor-v2
27 minItems: 1
31 minItems: 1
40 maxItems: 1
55 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
57 clocks = <&ap_clk 0>, <&ap_clk 1>;
/linux/drivers/gpu/drm/amd/amdgpu/
H A Datombios_encoders.c293 /* vertical FP must be at least 1 */ in amdgpu_atombios_encoder_mode_fixup()
391 case 1: in amdgpu_atombios_encoder_setup_dvo()
393 case 1: in amdgpu_atombios_encoder_setup_dvo()
531 * - 3 DIG transmitter blocks UNIPHY0/1/2 (links A and B).
543 * crtc -> dig encoder -> UNIPHY/LVTMA (1 or 2 links)
553 DIG_ENCODER_CONTROL_PARAMETERS_V2 v2; member
586 if (dig->dig_encoder == -1) in amdgpu_atombios_encoder_setup_dig_encoder()
595 case 1: in amdgpu_atombios_encoder_setup_dig_encoder()
597 case 1: in amdgpu_atombios_encoder_setup_dig_encoder()
682 args.v4.ucHPD_ID = hpd_id + 1; in amdgpu_atombios_encoder_setup_dig_encoder()
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