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/linux/include/video/
H A Dsh_mobile_lcdc.h75 #define LDDFR_CF1 (1 << 18)
105 RGB8 = LDMT1R_MIFTYP_RGB8, /* 24bpp, 8:8:8 */
106 RGB9 = LDMT1R_MIFTYP_RGB9, /* 18bpp, 9:9 */
107 RGB12A = LDMT1R_MIFTYP_RGB12A, /* 24bpp, 12:12 */
108 RGB12B = LDMT1R_MIFTYP_RGB12B, /* 12bpp */
109 RGB16 = LDMT1R_MIFTYP_RGB16, /* 16bpp */
110 RGB18 = LDMT1R_MIFTYP_RGB18, /* 18bpp */
111 RGB24 = LDMT1R_MIFTYP_RGB24, /* 24bpp */
112 YUV422 = LDMT1R_MIFTYP_YCBCR, /* 16bpp */
113 SYS8A = LDMT1R_IFM | LDMT1R_MIFTYP_SYS8A, /* 24bpp, 8:8:8 */
[all …]
/linux/Documentation/fb/
H A Darkfb.rst19 * 4 bpp pseudocolor modes (with 18bit palette, two variants)
20 * 8 bpp pseudocolor mode (with 18bit palette)
21 * 16 bpp truecolor modes (RGB 555 and RGB 565)
22 * 24 bpp truecolor mode (RGB 888)
23 * 32 bpp truecolor mode (RGB 888)
24 * text mode (activated by bpp = 0)
36 There are two 4 bpp modes. First mode (selected if nonstd == 0) is mode with
54 * support for fontwidths != 8 in 4 bpp modes
H A Ds3fb.rst26 * 4 bpp pseudocolor modes (with 18bit palette, two variants)
27 * 8 bpp pseudocolor mode (with 18bit palette)
28 * 16 bpp truecolor modes (RGB 555 and RGB 565)
29 * 24 bpp truecolor mode (RGB 888) on (only on Virge VX)
30 * 32 bpp truecolor mode (RGB 888) on (not on Virge VX)
31 * text mode (activated by bpp = 0)
45 There are two 4 bpp modes. First mode (selected if nonstd == 0) is mode with
62 * 24 bpp mode support on more cards
63 * support for fontwidths != 8 in 4 bpp modes
H A Dvt8623fb.rst18 * 4 bpp pseudocolor modes (with 18bit palette, two variants)
19 * 8 bpp pseudocolor mode (with 18bit palette)
20 * 16 bpp truecolor mode (RGB 565)
21 * 32 bpp truecolor mode (RGB 888)
22 * text mode (activated by bpp = 0)
33 There are two 4 bpp modes. First mode (selected if nonstd == 0) is mode with
49 * support for fontwidths != 8 in 4 bpp modes
/linux/drivers/gpu/drm/gma500/
H A Doaktrail.h76 struct oaktrail_timing_info DTD;/*18 bytes, Standard definition */
89 /* Bit0: 16bpp (not supported in LNC), */
90 /* Bit1: 18bpp loosely packed, */
91 /* Bit2: 18bpp packed, */
92 /* Bit3: 24bpp */
105 struct oaktrail_timing_info DTD;/*18 bytes, Standard definition */
119 /* Bit0: 16bpp (not supported in LNC), */
120 /* Bit1: 18bpp loosely packed, */
121 /* Bit2: 18bpp packed, */
122 /* Bit3: 24bpp */
H A Dintel_bios.c56 dev_priv->edp.bpp = 18; in parse_edp()
60 dev_priv->edp.bpp); in parse_edp()
68 dev_priv->edp.bpp = 18; in parse_edp()
71 dev_priv->edp.bpp = 24; in parse_edp()
74 dev_priv->edp.bpp = 30; in parse_edp()
103 DRM_DEBUG_KMS("VBT reports EDP: Lane_count %d, Lane_rate %d, Bpp %d\n", in parse_edp()
104 dev_priv->edp.lanes, dev_priv->edp.rate, dev_priv->edp.bpp); in parse_edp()
/linux/drivers/gpu/drm/i915/display/
H A Dintel_vdsc.c110 int bpp) in intel_vdsc_set_min_max_qp() argument
116 intel_lookup_range_min_qp(bpc, buf, bpp, vdsc_cfg->native_420); in intel_vdsc_set_min_max_qp()
118 intel_lookup_range_max_qp(bpc, buf, bpp, vdsc_cfg->native_420); in intel_vdsc_set_min_max_qp()
122 get_range_bpg_offset(int bpp_low, int offset_low, int bpp_high, int offset_high, int bpp) in get_range_bpg_offset() argument
124 return offset_low + DIV_ROUND_UP((offset_high - offset_low) * (bpp - bpp_low), in get_range_bpg_offset()
140 int bpp = fxp_q4_to_int(vdsc_cfg->bits_per_pixel); in calculate_rc_params() local
155 uncompressed_bpg_rate - 3 * bpp); in calculate_rc_params()
179 if (bpp >= 12) in calculate_rc_params()
181 else if (bpp >= 10) in calculate_rc_params()
182 vdsc_cfg->initial_offset = 5632 - DIV_ROUND_UP(((bpp - 10) * 3584), 2); in calculate_rc_params()
[all …]
/linux/drivers/media/platform/renesas/rzg2l-cru/
H A Drzg2l-csi2.c160 { 760, 16 }, { 810, 17 }, { 850, 18 },
205 .tclk_settle = 18,
214 .tclk_settle = 18,
215 .ths_settle = 18,
223 unsigned int bpp; member
227 { .code = MEDIA_BUS_FMT_UYVY8_1X16, .bpp = 16 },
228 { .code = MEDIA_BUS_FMT_SBGGR8_1X8, .bpp = 8, },
229 { .code = MEDIA_BUS_FMT_SGBRG8_1X8, .bpp = 8, },
230 { .code = MEDIA_BUS_FMT_SGRBG8_1X8, .bpp = 8, },
231 { .code = MEDIA_BUS_FMT_SRGGB8_1X8, .bpp = 8, },
[all …]
/linux/drivers/gpu/drm/msm/dp/
H A Ddp_link.h86 * msm_dp_link_bit_depth_to_bpp() - convert test bit depth to bpp
89 * Returns: the bits per pixel (bpp) to be used corresponding to the
103 return 18; in msm_dp_link_bit_depth_to_bpp()
115 u32 msm_dp_link_get_test_bits_depth(struct msm_dp_link *msm_dp_link, u32 bpp);
/linux/drivers/video/fbdev/
H A Datafb.c125 short bpp; member
221 2, 130, 66, 194, 34, 162, 98, 226, 18, 146, 82, 210, 50, 178, 114, 242,
497 "vga", 60, 640, 480, 39721, 42, 18, 31, 11, 100, 3,
501 "vga70", 70, 640, 400, 39721, 42, 18, 31, 11, 100, 3,
511 "falh", 60, 896, 608, 32000, 18, 42, 31, 1, 96,3,
583 int bpp = var->bits_per_pixel; in tt_decode_var() local
588 if (bpp > 1 || xres > sttt_xres * 2 || yres > tt_yres * 2) in tt_decode_var()
593 bpp = 1; in tt_decode_var()
595 if (bpp > 8 || xres > sttt_xres || yres > tt_yres) in tt_decode_var()
597 if (bpp > 4) { in tt_decode_var()
[all …]
H A Dpxafb.c242 /* calculate pixel depth, transparency bit included, >=16bpp formats _only_ */
249 /* calculate 4-bit BPP value for LCCR3 and OVLxC1 */
252 int bpp = -EINVAL; in pxafb_var_to_bpp() local
255 case 1: bpp = 0; break; in pxafb_var_to_bpp()
256 case 2: bpp = 1; break; in pxafb_var_to_bpp()
257 case 4: bpp = 2; break; in pxafb_var_to_bpp()
258 case 8: bpp = 3; break; in pxafb_var_to_bpp()
259 case 16: bpp = 4; break; in pxafb_var_to_bpp()
262 case 18: bpp = 6; break; /* 18-bits/pixel packed */ in pxafb_var_to_bpp()
263 case 19: bpp = 8; break; /* 19-bits/pixel packed */ in pxafb_var_to_bpp()
[all …]
H A Ds3c-fb.c116 * @valid_bpp: 1 bit per BPP setting to show valid bits-per-pixel.
118 * valid_bpp bit x is set if (x+1)BPP is supported.
225 * @bpp: The bit depth.
227 static bool s3c_fb_validate_win_bpp(struct s3c_fb_win *win, unsigned int bpp) in s3c_fb_validate_win_bpp() argument
229 return win->variant.valid_bpp & VALID_BPP(bpp); in s3c_fb_validate_win_bpp()
252 dev_dbg(sfb->dev, "win %d: unsupported bpp %d\n", in s3c_fb_check_var()
286 var->transp.offset = 18; in s3c_fb_check_var()
289 case 18: in s3c_fb_check_var()
302 /* 16 bpp, 565 format */ in s3c_fb_check_var()
318 /* our 24bpp is unpacked, so 32bpp */ in s3c_fb_check_var()
[all …]
H A Dimxfb.c46 unsigned char bpp; member
235 /* Actually this really is 18bit support, the lowest 2 bits of each colour
237 * like X work, which does not support 18bit.
390 var->bits_per_pixel = imxfb_mode->bpp; in imxfb_check_var()
748 u32 bpp; in imxfb_of_read_mode() local
761 ret = of_property_read_u32(np, "bits-per-pixel", &bpp); in imxfb_of_read_mode()
765 dev_err(dev, "Failed to read bpp and pcr from DT\n"); in imxfb_of_read_mode()
769 if (bpp < 1 || bpp > 255) { in imxfb_of_read_mode()
774 imxfb_mode->bpp = bpp; in imxfb_of_read_mode()
940 * be the same as m->bpp/8 in imxfb_probe()
[all …]
/linux/drivers/gpu/drm/radeon/
H A Dsi_reg.h50 /* 8 BPP */
52 /* 16 BPP */
59 /* 32 BPP */
81 # define SI_GRPH_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 18)
H A Dcik_reg.h52 /* 8 BPP */
54 /* 16 BPP */
61 /* 32 BPP */
83 # define CIK_GRPH_MACRO_TILE_ASPECT(x) (((x) & 0x3) << 18)
/linux/drivers/gpu/drm/ast/
H A Dast_reg.h41 #define AST_IO_VGACRCB_HWC_16BPP BIT(0) /* set: ARGB4444, cleared: 2bpp palette */
70 #define AST_IO_VGACRE0_24BPP BIT(5) /* 18 bpp, if unset */
/linux/drivers/gpu/drm/renesas/rz-du/
H A Drzg2l_mipi_dsi.c279 9, 11, 13, 15, 18, 21, 23, 24, 25, 27, 29, 31, 34, 36, 38,
299 18, 24, 29, 35, 40, 46, 51, 57, 62, 68, 73, 79, 84, 90,
552 unsigned int bpp; in rzg2l_dphy_conf_clks() local
561 * vclk * bpp = hsclk * 8 * lanes in rzg2l_dphy_conf_clks()
563 * bpp: video pixel bit depth in rzg2l_dphy_conf_clks()
569 bpp = mipi_dsi_pixel_format_to_bpp(dsi->format); in rzg2l_dphy_conf_clks()
570 *hsfreq_millihz = DIV_ROUND_CLOSEST_ULL(mul_u32_u32(vclk_rate, bpp * MILLI), in rzg2l_dphy_conf_clks()
583 unsigned int bpp; in rzv2h_dphy_mode_clk_check() local
585 bpp = mipi_dsi_pixel_format_to_bpp(dsi->format); in rzv2h_dphy_mode_clk_check()
597 hsfreq_millihz = DIV_ROUND_CLOSEST_ULL(cpg_dsi_parameters.div.freq_millihz * bpp, in rzv2h_dphy_mode_clk_check()
[all …]
/linux/drivers/gpu/drm/sun4i/
H A Dsun6i_mipi_dsi.c46 #define SUN6I_DSI_BASIC_CTL0_HS_EOTP_EN BIT(18)
215 BIT(12) | BIT(15) | BIT(18) | BIT(20) | BIT(21) | BIT(22)),
219 BIT(17) | BIT(18) | BIT(19) | BIT(20) | BIT(22) | BIT(23)),
221 BIT(16) | BIT(17) | BIT(18) | BIT(19) | BIT(21) | BIT(22) |
380 unsigned int Bpp = mipi_dsi_pixel_format_to_bpp(device->format) / 8; in sun6i_dsi_get_line_num() local
382 return mode->htotal * Bpp / device->lanes; in sun6i_dsi_get_line_num()
404 unsigned int Bpp = mipi_dsi_pixel_format_to_bpp(device->format) / 8; in sun6i_dsi_get_drq_edge1() local
409 edge1 += (mode->hdisplay + hbp + 20) * Bpp / device->lanes; in sun6i_dsi_get_drq_edge1()
534 int Bpp = mipi_dsi_pixel_format_to_bpp(device->format) / 8; in sun6i_dsi_setup_timings() local
543 hblk = mode->hdisplay * Bpp; in sun6i_dsi_setup_timings()
[all …]
/linux/drivers/staging/sm750fb/
H A Dsm750.c44 {NULL, 60, 1024, 600, 20423, 144, 40, 18, 1, 104, 3,
163 unsigned int base, pitch, bpp, rop; in lynxfb_ops_fillrect() local
178 bpp = info->var.bits_per_pixel >> 3; in lynxfb_ops_fillrect()
180 color = (bpp == 1) ? region->color : in lynxfb_ops_fillrect()
193 base, pitch, bpp, in lynxfb_ops_fillrect()
205 unsigned int base, pitch, bpp; in lynxfb_ops_copyarea() local
216 bpp = info->var.bits_per_pixel >> 3; in lynxfb_ops_copyarea()
228 base, pitch, bpp, region->dx, region->dy, in lynxfb_ops_copyarea()
237 unsigned int base, pitch, bpp; in lynxfb_ops_imageblit() local
250 bpp = info->var.bits_per_pixel >> 3; in lynxfb_ops_imageblit()
[all …]
/linux/drivers/gpu/drm/nouveau/dispnv04/
H A Dhw.h56 extern void nouveau_calc_arb(struct drm_device *, int vclk, int bpp,
367 (cre_heb & ~0x40) | ((offset >> 18) & 0x40)); in nv_set_crtc_base()
389 nv_pitch_align(struct drm_device *dev, uint32_t width, int bpp) in nv_pitch_align() argument
394 if (bpp == 15) in nv_pitch_align()
395 bpp = 16; in nv_pitch_align()
396 if (bpp == 24) in nv_pitch_align()
397 bpp = 8; in nv_pitch_align()
401 mask = 128 / bpp - 1; in nv_pitch_align()
403 mask = 512 / bpp - 1; in nv_pitch_align()
/linux/drivers/gpu/drm/bridge/cadence/
H A Dcdns-dsi-core.c48 #define DISP_EOT_GEN BIT(18)
65 #define SWAP_PINS_DAT(x) BIT(18 + ((x) * 2))
136 #define ERR_CONT_LP(x, l) BIT(18 + ((x) * 4) + (l))
148 #define PPI_C_TX_READY_HS BIT(18)
236 #define RD_DCS BIT(18)
269 #define BURST_MODE BIT(18)
478 int bpp; in cdns_dsi_mode2cfg() local
489 bpp = mipi_dsi_pixel_format_to_bpp(output->dev->format); in cdns_dsi_mode2cfg()
492 dsi_cfg->hbp = dpi_to_dsi_timing(dpi_hbp, bpp, in cdns_dsi_mode2cfg()
495 dsi_cfg->hsa = dpi_to_dsi_timing(dpi_hsa, bpp, in cdns_dsi_mode2cfg()
[all …]
/linux/arch/sparc/include/uapi/asm/
H A Dfbio.h33 #define FBTYPE_SUNGT 18
176 int mdi_mode; /* 8bpp, 16bpp or 32bpp */
/linux/arch/x86/boot/
H A Dvesa.h22 u16 total_memory; /* 18 */
38 u16 h_res; /* 18 */
43 u8 bpp; /* 25 */ member
/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Doverlay.c182 * RGB12U or RGB16 mode, and video port width interface is 18bpp or 24bpp
/linux/drivers/gpu/drm/bridge/imx/
H A Dimx93-mipi-dsi.c37 #define SHADOW_CLR BIT(18)
473 int bpp; in imx93_dsi_get_phy_configure_opts() local
476 bpp = mipi_dsi_pixel_format_to_bpp(format); in imx93_dsi_get_phy_configure_opts()
477 if (bpp < 0) { in imx93_dsi_get_phy_configure_opts()
478 dev_dbg(dev, "failed to get bpp for pixel format %d\n", format); in imx93_dsi_get_phy_configure_opts()
482 ret = phy_mipi_dphy_get_default_config(mode->clock * MSEC_PER_SEC, bpp, in imx93_dsi_get_phy_configure_opts()
723 HSTT(110, 25, 18, 17, 11),
724 HSTT(120, 26, 20, 18, 11),
736 HSTT(275, 43, 29, 32, 18),
738 HSTT(325, 48, 33, 36, 18),

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