| /linux/lib/crypto/x86/ |
| H A D | sha512-ssse3-asm.S | 98 # W[t]+K[t] (stack frame)
125 add WK_2(idx), T1 # W[t] + K[t] from message scheduler
129 add h_64, T1 # T1 = CH(e,f,g) + W[t] + K[t] + h
131 add tmp0, T1 # T1 = CH(e,f,g) + W[t] + K[t] + S1(e)
154 # Two rounds are computed based on the values for K[t-2]+W[t-2] and
155 # K[t-1]+W[t-1] which were previously stored at WK_2 by the message
162 # Eg. XMM2=W[t-2] really means XMM2={W[t-2]|W[t-1]}
171 movdqa W_t(idx), %xmm2 # XMM2 = W[t-2]
174 movdqa %xmm2, %xmm0 # XMM0 = W[t-2]
178 idx = \rnd - 15
[all …]
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| H A D | sha512-avx-asm.S | 77 # W[t] + K[t] | W[t+1] + K[t+1]
100 # W[t]+K[t] (stack frame)
131 add WK_2(idx), T1 # W[t] + K[t] from message scheduler
135 add h_64, T1 # T1 = CH(e,f,g) + W[t] + K[t] + h
137 add tmp0, T1 # T1 = CH(e,f,g) + W[t] + K[t] + S1(e)
159 # Two rounds are computed based on the values for K[t-2]+W[t-2] and
160 # K[t-1]+W[t-1] which were previously stored at WK_2 by the message
167 # Eg. XMM4=W[t-2] really means XMM4={W[t-2]|W[t-1]}
172 vmovdqa W_t(idx), %xmm4 # XMM4 = W[t-2]
173 idx = \rnd - 15
[all …]
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| H A D | sha256-ssse3-asm.S | 149 ## compute W[-16] + W[-7] 4 at a time
154 palignr $4, X2, XTMP0 # XTMP0 = W[-7]
162 paddd X0, XTMP0 # XTMP0 = W[-7] + W[-16]
167 palignr $4, X0, XTMP1 # XTMP1 = W[-15]
171 movdqa XTMP1, XTMP2 # XTMP2 = W[-15]
174 add _XFER(%rsp) , y2 # y2 = k + w + S1 + CH
175 movdqa XTMP1, XTMP3 # XTMP3 = W[-15]
177 add y2, h # h = h + S1 + CH + k + w
181 add h, d # d = d + h + S1 + CH + k + w
185 add y1, h # h = h + S1 + CH + k + w + S0
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| H A D | sha512-avx2-asm.S | 165 # Extract w[t-7]
166 MY_VPALIGNR YTMP0, Y_3, Y_2, 8 # YTMP0 = W[-7]
167 # Calculate w[t-16] + w[t-7]
168 vpaddq Y_0, YTMP0, YTMP0 # YTMP0 = W[-7] + W[-16]
169 # Extract w[t-15]
170 MY_VPALIGNR YTMP1, Y_1, Y_0, 8 # YTMP1 = W[-15]
174 # Calculate w[t-15] ror 1
177 vpor YTMP2, YTMP3, YTMP3 # YTMP3 = W[-15] ror 1
178 # Calculate w[t-15] shr 7
179 vpsrlq $7, YTMP1, YTMP4 # YTMP4 = W[-15] >> 7
[all …]
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| H A D | sha256-avx-asm.S | 155 ## compute W[-16] + W[-7] 4 at a time
160 vpalignr $4, X2, X3, XTMP0 # XTMP0 = W[-7]
167 vpaddd X0, XTMP0, XTMP0 # XTMP0 = W[-7] + W[-16]
172 vpalignr $4, X0, X1, XTMP1 # XTMP1 = W[-15]
178 add _XFER(%rsp), y2 # y2 = k + w + S1 + CH
180 add y2, h # h = h + S1 + CH + k + w
184 add h, d # d = d + h + S1 + CH + k + w
188 add y1, h # h = h + S1 + CH + k + w + S0
189 vpor XTMP2, XTMP3, XTMP3 # XTMP1 = W[-15] MY_ROR 7
191 add y0, h # h = h + S1 + CH + k + w + S0 + MAJ
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| /linux/drivers/video/fbdev/ |
| H A D | atafb_iplan2p4.c | 41 int w, l , i, j; in atafb_iplan2p4_copyarea() local
46 if (!((sx ^ dx) & 15)) { in atafb_iplan2p4_copyarea()
50 src = (u8 *)info->screen_base + sy * next_line + (sx & ~15) / (8 / BPL); in atafb_iplan2p4_copyarea()
51 dst = (u8 *)info->screen_base + dy * next_line + (dx & ~15) / (8 / BPL); in atafb_iplan2p4_copyarea()
52 if (sx & 15) { in atafb_iplan2p4_copyarea()
58 w = width >> 4; in atafb_iplan2p4_copyarea()
59 if (w) { in atafb_iplan2p4_copyarea()
62 w *= BPL / 2; in atafb_iplan2p4_copyarea()
63 l = next_line - w * 4; in atafb_iplan2p4_copyarea()
65 for (i = w; i > 0; i--) in atafb_iplan2p4_copyarea()
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| H A D | atafb_iplan2p2.c | 41 int w, l , i, j; in atafb_iplan2p2_copyarea() local
46 if (!((sx ^ dx) & 15)) { in atafb_iplan2p2_copyarea()
50 src = (u8 *)info->screen_base + sy * next_line + (sx & ~15) / (8 / BPL); in atafb_iplan2p2_copyarea()
51 dst = (u8 *)info->screen_base + dy * next_line + (dx & ~15) / (8 / BPL); in atafb_iplan2p2_copyarea()
52 if (sx & 15) { in atafb_iplan2p2_copyarea()
58 w = width >> 4; in atafb_iplan2p2_copyarea()
59 if (w) { in atafb_iplan2p2_copyarea()
62 w *= BPL / 2; in atafb_iplan2p2_copyarea()
63 l = next_line - w * 4; in atafb_iplan2p2_copyarea()
65 for (i = w; i > 0; i--) in atafb_iplan2p2_copyarea()
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| H A D | atafb_iplan2p8.c | 48 int w, l , i, j; in atafb_iplan2p8_copyarea() local
53 if (!((sx ^ dx) & 15)) { in atafb_iplan2p8_copyarea()
57 src = (u8 *)info->screen_base + sy * next_line + (sx & ~15) / (8 / BPL); in atafb_iplan2p8_copyarea()
58 dst = (u8 *)info->screen_base + dy * next_line + (dx & ~15) / (8 / BPL); in atafb_iplan2p8_copyarea()
59 if (sx & 15) { in atafb_iplan2p8_copyarea()
65 w = width >> 4; in atafb_iplan2p8_copyarea()
66 if (w) { in atafb_iplan2p8_copyarea()
69 w *= BPL / 2; in atafb_iplan2p8_copyarea()
70 l = next_line - w * 4; in atafb_iplan2p8_copyarea()
72 for (i = w; i > 0; i--) in atafb_iplan2p8_copyarea()
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| /linux/lib/crypto/ |
| H A D | sha512.c | 84 u64 W[16]; in sha512_block_generic() local
87 W[j] = get_unaligned_be64(data + j * sizeof(u64)); in sha512_block_generic()
90 if ((i & 15) == 0 && i != 0) { in sha512_block_generic()
92 W[j & 15] += s1(W[(j - 2) & 15]) + in sha512_block_generic()
93 W[(j - 7) & 15] + in sha512_block_generic()
94 s0(W[(j - 15) & 15]); in sha512_block_generic()
97 t1 = h + e1(e) + Ch(e, f, g) + sha512_K[i] + W[(i & 15)]; in sha512_block_generic()
99 t1 = g + e1(d) + Ch(d, e, f) + sha512_K[i+1] + W[(i & 15) + 1]; in sha512_block_generic()
101 t1 = f + e1(c) + Ch(c, d, e) + sha512_K[i+2] + W[(i & 15) + 2]; in sha512_block_generic()
103 t1 = e + e1(b) + Ch(b, c, d) + sha512_K[i+3] + W[(i & 15) + 3]; in sha512_block_generic()
[all …]
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| H A D | md5.c | 31 #define MD5STEP(f, w, x, y, z, in, s) \ argument
32 (w += f(x, y, z) + in, w = (w << s | w >> (32 - s)) + x)
63 MD5STEP(F1, b, c, d, a, in[15] + 0x49b40821, 22); in md5_block_generic()
71 MD5STEP(F2, c, d, a, b, in[15] + 0xd8a1e681, 14); in md5_block_generic()
96 MD5STEP(F3, c, d, a, b, in[15] + 0x1fa27cf8, 16); in md5_block_generic()
101 MD5STEP(F4, c, d, a, b, in[14] + 0xab9423a7, 15); in md5_block_generic()
105 MD5STEP(F4, c, d, a, b, in[10] + 0xffeff47d, 15); in md5_block_generic()
108 MD5STEP(F4, d, a, b, c, in[15] + 0xfe2ce6e0, 10); in md5_block_generic()
109 MD5STEP(F4, c, d, a, b, in[6] + 0xa3014314, 15); in md5_block_generic()
113 MD5STEP(F4, c, d, a, b, in[2] + 0x2ad7d2bb, 15); in md5_block_generic()
[all …]
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| /linux/sound/mips/ |
| H A D | ad1843.c | 36 ad1843_INIT = { 0, 15, 1 }, /* Clock Initialization Flag */
46 ad1843_LD2MM = { 3, 15, 1 }, /* Left DAC 2 Mix Mute */
50 ad1843_LX1MM = { 4, 15, 1 }, /* Left Aux 1 Mix Mute */
54 ad1843_LX2MM = { 5, 15, 1 }, /* Left Aux 2 Mix Mute */
58 ad1843_LMCMM = { 7, 15, 1 }, /* Left Mic Mix Mute */
65 ad1843_LDA1GM = { 9, 15, 1 }, /* Left DAC1 Analog Mute */
69 ad1843_LDA2GM = { 10, 15, 1 }, /* Left DAC2 Analog Mute */
71 ad1843_LDA1AM = { 11, 15, 1 }, /* Left DAC1 Digital Mute */
73 ad1843_LDA2AM = { 12, 15, 1 }, /* Left DAC2 Digital Mute */
74 ad1843_ADLC = { 15, 0, 2 }, /* ADC Left Sample Rate Source */
[all …]
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| /linux/drivers/net/ethernet/marvell/ |
| H A D | skge.h | 185 IS_R1_C = 1<<15, /* Q_R1 Encoding Error */
335 BMU_BBC = 0xffffL, /* Bit 15.. 0: Buffer Byte Counter */
528 /* GPHY address (bits 15..11 of SMI control reg) */
583 MFF_CLR_PERR = 1<<15, /* Clear Parity Error IRQ */
714 CSR_SV_RUN = 1<<15, /* Release Supervisor SM */
899 XMR_FS_BC = 1<<15, /* Bit 15: Broadcast Frame */
930 PHY_XMAC_CTRL = 0x00,/* 16 bit r/w PHY Control Register */
931 PHY_XMAC_STAT = 0x01,/* 16 bit r/w PHY Status Register */
934 PHY_XMAC_AUNE_ADV = 0x04,/* 16 bit r/w Auto-Neg. Advertisement */
937 PHY_XMAC_NEPG = 0x07,/* 16 bit r/w Next Page Register */
[all …]
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| H A D | sky2.h | 39 PCI_Y2_PME_LEGACY= 1<<15, /* PCI Express legacy power management mode */
66 P_CLK_COR_YTB_ARB_DIS = 1<<15,/* Disable Clock YTB Arbiter */
100 P_FORCE_ASPM_REQUEST = 1<<15, /* Force ASPM Request (A1 only) */
226 PSM_CONFIG_REG1_FORCE_TESTMODE_ZERO= 1<<15, /* Force internal Testmode as 1'b0 */
370 Y2_HW_WOL_ON = 1<<15,/* HW WOL On (Yukon-EC Ultra A1 only) */
518 GLB_GPIO_INT_RST_D3_DIS = 1<<15, /* Disable Internal Reset After D3 to D0 */
868 BMU_ENA_RX_RSS_HASH = 1<<15, /* Enable Rx RSS Hash */
1138 PHY_MARV_CTRL = 0x00,/* 16 bit r/w PHY Control Register */
1142 PHY_MARV_AUNE_ADV = 0x04,/* 16 bit r/w Auto-Neg. Advertisement */
1145 PHY_MARV_NEPG = 0x07,/* 16 bit r/w Next Page Register */
[all …]
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| /linux/include/linux/soc/ti/ |
| H A D | omap1-usb.h | 24 # define USB2_TRX_MODE(w) (((w)>>24)&0x07) argument
25 # define USB1_TRX_MODE(w) (((w)>>20)&0x07) argument
26 # define USB0_TRX_MODE(w) (((w)>>16)&0x07) argument
27 # define OTG_IDLE_EN (1 << 15)
38 # define SRP_GPUVBUS(w) (((w)>>24)&0x07) argument
39 # define A_WAIT_VRISE(w) (((w)>>20)&0x07) argument
40 # define B_ASE_BRST(w) (((w)>>16)&0x07) argument
49 # define OTG_HMC(w) (((w)>>0)&0x3f) argument
65 # define OTG_DRIVER_SEL (1 << 15)
78 # define DRIVER_SWITCH (1 << 15)
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| /linux/drivers/scsi/ |
| H A D | nsp32.h | 81 #define IRQ_CONTROL 0x00 /* BASE+00, W, W */
82 #define IRQ_STATUS 0x00 /* BASE+00, W, R */
98 # define SCSI_IRQ_MASK BIT(15)
112 #define TRANSFER_CONTROL 0x02 /* BASE+02, W, W */
113 #define TRANSFER_STATUS 0x02 /* BASE+02, W, R */
128 # define FIFOTEST BIT(15)
130 #define INDEX_REG 0x04 /* BASE+04, Byte(R/W), Word(R) */
132 #define TIMER_SET 0x06 /* BASE+06, W, R/W */
136 #define DATA_REG_LOW 0x08 /* BASE+08, LowW, R/W */
137 #define DATA_REG_HI 0x0a /* BASE+0a, Hi-W, R/W */
[all …]
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| /linux/drivers/memory/ |
| H A D | renesas-rpc-if-regs.h | 13 #define RPCIF_CMNCR 0x0000 /* R/W */
28 #define RPCIF_SSLDR 0x0004 /* R/W */
33 #define RPCIF_DRCR 0x000C /* R/W */
40 #define RPCIF_DRCMR 0x0010 /* R/W */
44 #define RPCIF_DREAR 0x0014 /* R/W */
48 #define RPCIF_DROPR 0x0018 /* R/W */
50 #define RPCIF_DRENR 0x001C /* R/W */
56 #define RPCIF_DRENR_DME BIT(15)
62 #define RPCIF_SMCR 0x0020 /* R/W */
68 #define RPCIF_SMCMR 0x0024 /* R/W */
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| /linux/include/linux/mmc/ |
| H A D | mmc.h | 21 * 15 May 2002
36 #define MMC_SLEEP_AWAKE 5 /* ac [31:16] RCA 15:flg R1b */
46 #define MMC_GO_INACTIVE_STATE 15 /* ac [31:16] RCA */
114 * [15:08] Value Byte
150 #define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */
200 #define R2_SPI_OUT_OF_RANGE (1 << 15) /* or CSD overwrite */
212 /* (CMD0,1,2,3,4,7,9,10,12,13,15) */
256 #define EXT_CSD_CMDQ_MODE_EN 15 /* R/W */
257 #define EXT_CSD_FLUSH_CACHE 32 /* W */
258 #define EXT_CSD_CACHE_CTRL 33 /* R/W */
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| /linux/drivers/gpu/drm/i915/display/ |
| H A D | i9xx_plane_regs.h | 31 #define DISP_FORMAT_RGBA888 REG_FIELD_PREP(DISP_FORMAT_MASK, 15)
40 #define DISP_ROTATE_180 REG_BIT(15) /* i965+ */
41 #define DISP_ALPHA_TRANS_ENABLE REG_BIT(15) /* pre-g4x plane B */
61 #define DISP_POS_X_MASK REG_GENMASK(15, 0)
68 #define DISP_WIDTH_MASK REG_GENMASK(15, 0)
69 #define DISP_WIDTH(w) REG_FIELD_PREP(DISP_WIDTH_MASK, (w)) argument
79 #define DISP_OFFSET_X_MASK REG_GENMASK(15, 0)
96 #define PRIM_POS_X_MASK REG_GENMASK(15, 0)
103 #define PRIM_WIDTH_MASK REG_GENMASK(15, 0)
104 #define PRIM_WIDTH(w) REG_FIELD_PREP(PRIM_WIDTH_MASK, (w)) argument
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| H A D | intel_sprite_regs.h | 30 #define DVS_ROTATE_180 REG_BIT(15)
48 #define DVS_POS_X_MASK REG_GENMASK(15, 0)
56 #define DVS_WIDTH_MASK REG_GENMASK(15, 0)
57 #define DVS_WIDTH(w) REG_FIELD_PREP(DVS_WIDTH_MASK, (w)) argument
81 #define DVS_OFFSET_X_MASK REG_GENMASK(15, 0)
103 #define DVS_SRC_WIDTH(w) REG_FIELD_PREP(DVS_SRC_WIDTH_MASK, (w)) argument
139 #define SPRITE_ROTATE_180 REG_BIT(15)
158 #define SPRITE_POS_X_MASK REG_GENMASK(15, 0)
166 #define SPRITE_WIDTH_MASK REG_GENMASK(15, 0)
167 #define SPRITE_WIDTH(w) REG_FIELD_PREP(SPRITE_WIDTH_MASK, (w)) argument
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| /linux/tools/perf/tests/shell/common/ |
| H A D | patterns.sh | 31 # 15:12:27
35 #! 17:60:15
38 export RE_DATE_TIME="\w+\s+\w+\s+$RE_NUMBER\s+$RE_TIME\s+$RE_NUMBER"
44 #! Po úno 14 15:17:32 2010
70 export RE_EVENT_ANY="[\w\-\:\/_=,]+"
79 export RE_EVENT="[\w\-:_]+"
92 export RE_EVENT_CPU="cpu/(\w+=$RE_NUMBER_HEX,?)+/p*"
104 export RE_EVENT_SUBSYSTEM="[\w\-]+:[\w\-]+"
111 export RE_FILE_NAME="[\w\+\.-]+"
137 …TH_ABSOLUTE(?: \(deleted\))?|\[kernel\.kallsyms\]|\[unknown\]|\[vdso\]|\[kernel\.vmlinux\][\.\w]*)"
[all …]
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| /linux/arch/csky/kernel/ |
| H A D | head.S | 26 ld.w r6, (r6, 0)
27 mtcr r6, cr<31, 15>
31 ld.w r6, (r6, 0)
32 mtcr r6, cr<28, 15>
33 mtcr r6, cr<29, 15>
37 ld.w r6, (r6, 0)
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| /linux/arch/arm/lib/ |
| H A D | memmove.S | 82 6: W(nop)
83 W(ldr) r3, [r1, #-4]!
84 W(ldr) r4, [r1, #-4]!
85 W(ldr) r5, [r1, #-4]!
86 W(ldr) r6, [r1, #-4]!
87 W(ldr) r8, [r1, #-4]!
88 W(ldr) r9, [r1, #-4]!
89 W(ldr) lr, [r1, #-4]!
93 W(nop)
94 W(str) r3, [r0, #-4]!
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| /linux/arch/arm64/include/asm/ |
| H A D | fpsimdmacros.h | 29 str w\tmpnr, [\state, #16 * 2]
31 str w\tmpnr, [\state, #16 * 2 + 4]
64 ldr w\tmpnr, [\state, #16 * 2]
66 ldr w\tmpnr, [\state, #16 * 2 + 4]
85 .if (\pnr) < 0 || (\pnr) > 15
97 .if (\v) < 12 || (\v) > 15
300 _for n, 0, 15, _sve_pfalse \n
308 _for n, 0, 15, _sve_str_p \n, \nxbase, \n - 16
318 str w\nxtmp, [\xpfpsr]
320 str w\nxtmp, [\xpfpsr, #4]
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| /linux/lib/crypto/powerpc/ |
| H A D | md5-asm.S | 62 LOAD_DATA(w0, off) /* W */ \
66 LOAD_DATA(w1, off+4) /* W */ \
68 addi w0,w0,k0l; /* 1: wk = w + k */ \
70 addis w0,w0,k0h; /* 1: wk = w + k' */ \
71 addis w1,w1,k1h; /* 2: wk = w + k */ \
73 addi w1,w1,k1l; /* 2: wk = w + k' */ \
88 addi w0,w0,k0l; /* 1: wk = w + k */ \
90 addis w0,w0,k0h; /* 1: wk = w + k' */ \
92 addi w1,w1,k1l; /* 2: wk = w + k */ \
94 addis w1,w1,k1h; /* 2: wk = w + k' */ \
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| H A D | sha256-spe-asm.S | 101 #define R_LOAD_W(a, b, c, d, e, f, g, h, w, off) \ argument
102 LOAD_DATA(w, off) /* 1: W */ \
113 add rT3,rT3,w; /* 1: temp1' = ch + w */ \
122 evmergelo w,w,w; /* shift W */ \
126 LOAD_DATA(w, off+4) /* 2: W */ \
140 add rT3,rT3,w; /* 2: temp1' = ch + w */ \
158 evmergelohi rT0,w0,w1; /* w[-15] */ \
160 evsrwiu rT1,rT0,3; /* s0 = w[-15] >> 3 */ \
162 evrlwi rT0,rT0,25; /* s0' = w[-15] rotr 7 */ \
166 evrlwi rT0,rT0,21; /* s0' = w[-15] rotr 18 */ \
[all …]
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