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/linux/drivers/net/can/dev/
H A Dlength.c28 14, 14, 14, 14, 14, 14, 14, 14, /* 33 - 40 */
29 14, 14, 14, 14, 14, 14, 14, 14, /* 41 - 48 */
49 * of a given skb.
50 * @skb: socket buffer of a CAN message.
52 * Do a rough calculation: bit stuffing is ignored and length in bits
53 * is rounded up to a length in bytes.
56 * (netdev_sent_queue() and netdev_completed_queue()) which expect a
62 * Remarks: The payload of CAN FD frames with BRS flag are sent at a
/linux/Documentation/ABI/testing/
H A Dsysfs-devices-platform-trackpoint3 KernelVersion: 2.6.14
10 KernelVersion: 2.6.14
18 KernelVersion: 2.6.14
25 KernelVersion: 2.6.14
33 KernelVersion: 2.6.14
40 KernelVersion: 2.6.14
47 KernelVersion: 2.6.14
50 (RW) Minimum value for z-axis force required to trigger a press
55 KernelVersion: 2.6.14
58 (RW) The offset from the running average required to generate a
[all …]
H A Dsysfs-devices-platform-soc-ipa3 KernelVersion: v5.14
13 KernelVersion: v5.14
17 version, as a period-separated set of two or three integers
22 KernelVersion: v5.14
25 The .../XXXXXXX.ipa/feature/ directory contains a set of
31 KernelVersion: v5.14
34 The .../XXXXXXX.ipa/feature/rx_offload file contains a
41 KernelVersion: v5.14
44 The .../XXXXXXX.ipa/feature/tx_offload file contains a
57 from the perspective of the AP. An endpoint ID is a
[all …]
/linux/Documentation/devicetree/bindings/net/wireless/
H A Dmediatek,mt76.yaml17 wireless device. The node is expected to be specified as a child
97 Phandle to a MTD partition + offset containing EEPROM data
115 Disable/enable radar/CAC detection running on a dedicated offchannel
118 switching on a different channel during CAC detection on the selected
145 Regdomain refers to a legal regulatory region. Different
147 power, time that a channel can be occupied, and different
272 rates-ofdm = /bits/ 8 <14 14 14 14 14 14 14 14>;
273 rates-mcs = /bits/ 8 <4 14 14 14 14 14 14 14 14 14 14>;
275 rates-ru = /bits/ 8 <7 14 14 14 14 14 14 14 14 14 14 14 14>;
/linux/arch/parisc/include/asm/
H A Delf.h64 #define R_PARISC_DIR14R 6 /* Right 14 bits of eff. address. */
69 #define R_PARISC_PCREL14R 14 /* Right 14 bits of rel. address. */
71 #define R_PARISC_DPREL14R 22 /* Right 14 bits of rel. address. */
73 #define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */
75 #define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */
80 #define R_PARISC_PLTOFF14R 54 /* PLT rel. address, right 14 bits. */
83 #define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */
88 #define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */
89 #define R_PARISC_PCREL14DR 76 /* PC rel. address, right 14 bits. */
94 #define R_PARISC_DIR14WR 83 /* 14 bits of eff. address. */
[all …]
/linux/drivers/gpu/drm/nouveau/include/nvhw/class/
H A Dcl507d.h4 * Permission is hereby granted, free of charge, to any person obtaining a
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
88 #define NV507D_DAC_SET_CONTROL(a) (0x00000400 + (a)*0… argument
119 #define NV507D_DAC_SET_CONTROL_INVALIDATE_FIRST_FIELD 14:14
122 #define NV507D_DAC_SET_POLARITY(a) (0x00000404 + (a)*0… argument
131 #define NV507D_SOR_SET_CONTROL(a) (0x00000600 + (a)*0… argument
156 #define NV507D_SOR_SET_CONTROL_DE_SYNC_POLARITY 14:14
160 #define NV507D_PIOR_SET_CONTROL(a) (0x00000700 + (a)*0… argument
179 #define NV507D_PIOR_SET_CONTROL_DE_SYNC_POLARITY 14:14
183 #define NV507D_HEAD_SET_PIXEL_CLOCK(a) (0x00000804 + (a)*0… argument
[all …]
H A Dcl907d.h4 * Permission is hereby granted, free of charge, to any person obtaining a
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
56 #define NV907D_CORE_NOTIFIER_3_CAPABILITIES_CAP_SOR0_20_R3 15:14
72 #define NV907D_DAC_SET_CONTROL(a) (0x00000180 + (a)*0… argument
83 #define NV907D_SOR_SET_CONTROL(a) (0x00000200 + (a)*0… argument
98 #define NV907D_SOR_SET_CONTROL_DE_SYNC_POLARITY 14:14
106 #define NV907D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00000404 + (a)*0… argument
128 #define NV907D_HEAD_SET_CONTROL(a) (0x00000408 + (a)*0… argument
132 #define NV907D_HEAD_SET_OVERSCAN_COLOR(a) (0x00000410 + (a)*0… argument
136 #define NV907D_HEAD_SET_RASTER_SIZE(a) (0x00000414 + (a)*0… argument
[all …]
H A Dclc57d.h4 * Permission is hereby granted, free of charge, to any person obtaining a
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
30 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS(a) (0x00001004 + (a)*0… argument
73 #define NVC57D_WINDOW_SET_WINDOW_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14
82 #define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS(a) (0x00001008 + (a)*0… argument
125 #define NVC57D_WINDOW_SET_WINDOW_ROTATED_FORMAT_USAGE_BOUNDS_EXT_YUV_SEMI_PLANAR422 14:14
134 #define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS(a) (0x00001010 + (a)*0… argument
135 #define NVC57D_WINDOW_SET_WINDOW_USAGE_BOUNDS_MAX_PIXELS_FETCHED_PER_LINE 14:0
149 #define NVC57D_HEAD_SET_PROCAMP(a) (0x00002000 + (a)*0… argument
161 #define NVC57D_HEAD_SET_CONTROL_OUTPUT_RESOURCE(a) (0x00002004 + (a)*0… argument
[all …]
/linux/include/dt-bindings/pinctrl/
H A Dpinctrl-sg2000.h14 ((((row) - 'A' + 1) << 8) + ((col) - 1))
16 #define PIN_MIPI_TXM4 PINPOS('A', 2)
17 #define PIN_MIPIRX0N PINPOS('A', 4)
18 #define PIN_MIPIRX3P PINPOS('A', 6)
19 #define PIN_MIPIRX4P PINPOS('A', 7)
20 #define PIN_VIVO_D2 PINPOS('A', 9)
21 #define PIN_VIVO_D3 PINPOS('A', 10)
22 #define PIN_VIVO_D10 PINPOS('A', 12)
23 #define PIN_USB_VBUS_DET PINPOS('A', 13)
50 #define PIN_ETH_RXP PINPOS('C', 14)
[all …]
H A Dpinctrl-cv1812h.h14 ((((row) - 'A' + 1) << 8) + ((col) - 1))
16 #define PIN_MIPI_TXM4 PINPOS('A', 2)
17 #define PIN_MIPIRX0N PINPOS('A', 4)
18 #define PIN_MIPIRX3P PINPOS('A', 6)
19 #define PIN_MIPIRX4P PINPOS('A', 7)
20 #define PIN_VIVO_D2 PINPOS('A', 9)
21 #define PIN_VIVO_D3 PINPOS('A', 10)
22 #define PIN_VIVO_D10 PINPOS('A', 12)
23 #define PIN_USB_VBUS_DET PINPOS('A', 13)
50 #define PIN_ETH_RXP PINPOS('C', 14)
[all …]
/linux/drivers/media/platform/chips-media/coda/
H A Dcoda-mpeg2.c51 * 10 11 11 12 12 12 13 13 13 13 14 14 14 14 14 15
53 * 17 17 17 17 18 18 18 19 18 18 18 19 1a 1a 1a 1a
55 * 00 00 01 b5 14 8a 00 01 00 00
60 * 00 00 01 b5 14 8a 00 01 00 00
/linux/lib/crypto/
H A Dblake2s.c3 * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
20 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
21 { 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
22 { 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
23 { 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
24 { 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
25 { 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
26 { 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
27 { 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
28 { 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
[all …]
/linux/tools/testing/selftests/bpf/prog_tests/
H A Dalign.c107 {5, "R4", "14"},
126 {2, "R3", "14"},
206 {14, "R4", "var_off=(0x0; 0x7f8)"},
219 BPF_ALU64_IMM(BPF_ADD, BPF_REG_5, 14),
239 {4, "R5", "pkt(off=14,r=0)"},
240 {5, "R4", "pkt(off=14,r=0)"},
242 {10, "R5", "pkt(off=14,r=18)"},
245 {14, "R4", "var_off=(0x0; 0xffff)"},
254 /* First, add a constant to the R5 packet pointer,
255 * then a variabl
[all...]
/linux/lib/crypto/arm/
H A Dblake2s-core.S27 .macro __ldrd a, b, src, offset
29 ldrd \a, \b, [\src, #\offset]
31 ldr \a, [\src, #\offset]
36 .macro __strd a, b, dst, offset
38 strd \a, \b, [\dst, #\offset]
40 str \a, [\dst, #\offset]
45 .macro _le32_bswap a, tmp
47 rev_l \a, \tmp
51 .macro _le32_bswap_8x a, b, c, d, e, f, g, h, tmp
52 _le32_bswap \a, \tmp
[all …]
/linux/Documentation/devicetree/bindings/soc/socionext/
H A Dsocionext,uniphier-dwc3-glue.yaml14 a sideband logic handling signals to DWC3 host controller inside
41 "^reset-controller@[0-9a-f]+$":
44 "^regulator@[0-9a-f]+$":
47 "^phy@[0-9a-f]+$":
72 clocks = <&sys_clk 14>;
74 resets = <&sys_rst 14>;
81 clocks = <&sys_clk 14>;
83 resets = <&sys_rst 14>;
91 clocks = <&sys_clk 14>, <&sys_clk 16>;
93 resets = <&sys_rst 14>, <&sys_rst 16>;
[all …]
/linux/lib/crypto/powerpc/
H A Dpoly1305-p10le_64.S18 # a += m
19 # a = (r + a) % p
20 # a += s
40 # Each word in a vector consists a member of a "r/s" in [a * r/s].
97 SAVE_GPR 14, 112, 1
130 SAVE_VSX 14, 192, 9
165 RESTORE_VSX 14, 192, 9
184 RESTORE_GPR 14, 112, 1
220 vmulouw 14, 4, 26
226 vaddudm 14, 14, 10
[all …]
/linux/lib/crypto/mips/
H A Dchacha-core.S4 * Copyright (C) 2015-2019 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
40 /* NONCE[0] is kept in a register and not in memory.
82 x(14); \
87 x(14); \
116 #define PLUS_ONE_13 14
120 #define _CONCAT3(a,b,c) a ## b ## c argument
121 #define CONCAT3(a,b,c) _CONCAT3(a,b,c) argument
182 #define AXR(A, B, C, D, K, L, M, N, V, W, Y, Z, S) \ argument
183 addu X(A), X(K); \
187 xor X(V), X(A); \
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dv3,v360epc-pci.yaml35 The inbound ranges must be aligned to a 1MB boundary, and may be 1MB, 2MB,
80 <0x4800 0 0 1 &pic 13>, /* INT A on slot 9 is irq 13 */
81 <0x4800 0 0 2 &pic 14>, /* INT B on slot 9 is irq 14 */
85 <0x5000 0 0 1 &pic 14>, /* INT A on slot 10 is irq 14 */
90 <0x5800 0 0 1 &pic 15>, /* INT A on slot 11 is irq 15 */
93 <0x5800 0 0 4 &pic 14>, /* INT D on slot 11 is irq 14 */
95 <0x6000 0 0 1 &pic 16>, /* INT A on slot 12 is irq 16 */
97 <0x6000 0 0 3 &pic 14>, /* INT C on slot 12 is irq 14 */
/linux/Documentation/devicetree/bindings/display/msm/
H A Ddsi-phy-14nm.yaml4 $id: http://devicetree.org/schemas/display/msm/dsi-phy-14nm.yaml#
7 title: Qualcomm Display DSI 14nm PHY
18 - qcom,dsi-phy-14nm
19 - qcom,dsi-phy-14nm-2290
20 - qcom,dsi-phy-14nm-660
21 - qcom,dsi-phy-14nm-8953
22 - qcom,sm6125-dsi-phy-14nm
23 - qcom,sm6150-dsi-phy-14nm
42 A phandle and PM domain specifier for an optional power domain.
47 A phandle to an OPP node describing the power domain's performance point.
[all …]
/linux/arch/arm/crypto/
H A Dblake2b-neon-core.S65 // pointer points to a 32-byte aligned buffer containing a copy of q8 and q9
74 // (v[2], v[6], v[10], v[14]), and (v[3], v[7], v[11], v[15]).
76 // a += b + m[blake2b_sigma[r][2*i + 0]];
84 // d = ror64(d ^ a, 32);
103 // a += b + m[blake2b_sigma[r][2*i + 1]];
118 // d = ror64(d ^ a, 16);
133 // This rotation amount isn't a multiple of 8, so it has to be
134 // implemented using a pair of shifts, which requires temporary
146 // (v[2], v[7], v[8], v[13]), and (v[3], v[4], v[9], v[14]).
154 // a += b + m[blake2b_sigma[r][2*i + 0]];
[all …]
/linux/lib/crypto/x86/
H A Dsha512-avx2-asm.S12 # This software is available to you under a choice of one of two
33 # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
49 # This code schedules 1 blocks at a time, with 4 lanes per block
86 a = %rax define
142 # Rotate symbols a..h right
151 b = a
152 a = TMP_ define
181 mov a, y3 # y3 = a # MAJA
185 or c, y3 # y3 = a|c # MAJA
187 rorx $34, a, T1 # T1 = a >> 34 # S0B
[all …]
/linux/fs/hpfs/
H A Dalloc.c65 * Check if a sector is allocated in bitmap
73 if (!(bmp = hpfs_map_bitmap(s, sec >> 14, &qbh, "chk"))) goto fail; in chk_if_allocated()
123 int a, b; in alloc_in_bmp() local
130 if (!(bmp = hpfs_map_bitmap(s, near >> 14, &qbh, "aib"))) goto uls; in alloc_in_bmp()
139 while ((a = tstbits(bmp, q, n + forward)) != 0) { in alloc_in_bmp()
140 q += a; in alloc_in_bmp()
149 if (!a) { in alloc_in_bmp()
167 while ((a = tstbits(bmp, q, n + forward)) != 0) { in alloc_in_bmp()
168 q += a; in alloc_in_bmp()
172 if (!a) { in alloc_in_bmp()
[all …]
/linux/tools/testing/selftests/net/netfilter/
H A Dconntrack_sctp_collision.sh6 # 14:35:47.655279 IP CLIENT_IP.PORT > SERVER_IP.PORT: sctp (1) [INIT] [init tag: 2017837359]
7 # 14:35:48.353250 IP SERVER_IP.PORT > CLIENT_IP.PORT: sctp (1) [INIT] [init tag: 1187206187]
8 # 14:35:48.353275 IP CLIENT_IP.PORT > SERVER_IP.PORT: sctp (1) [INIT ACK] [init tag: 2017837359]
9 # 14:35:48.353283 IP SERVER_IP.PORT > CLIENT_IP.PORT: sctp (1) [COOKIE ECHO]
10 # 14:35:48.353977 IP CLIENT_IP.PORT > SERVER_IP.PORT: sctp (1) [COOKIE ACK]
11 # 14:35:48.855335 IP SERVER_IP.PORT > CLIENT_IP.PORT: sctp (1) [INIT ACK] [init tag: 164579970]
46 # simulate the delay on OVS upcall by setting up a delay for INIT_ACK with
58 ip net exec "$ROUTER_NS" iptables -A FORWARD -m state --state INVALID,UNTRACKED -j DROP
59 ip net exec "$ROUTER_NS" iptables -A INPUT -p sctp -j DROP
61 # use a smaller number for assoc's max_retrans to reproduce the issue
[all …]
/linux/arch/arm/boot/dts/intel/ixp/
H A Dintel-ixp42x-goramo-multilink.dts5 * - MultiLink Basic (a box)
10 * (HSS) link for a V.35 WAN interface.
45 * 74HC4094 which is used as a rudimentary GPIO expander
48 * - Write a pure DT GPIO driver using these bindings
90 * The IDSELs are 11, 12, 13, 14.
95 /* IDSEL 11 - Ethernet A */
96 <0x5800 0 0 1 &gpio0 4 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 11 is irq 4 */
101 <0x6000 0 0 1 &gpio0 5 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 12 is irq 5 */
106 <0x6800 0 0 1 &gpio0 12 IRQ_TYPE_LEVEL_LOW>, /* INT A on slot 13 is irq 12 */
110 /* IDSEL 14 - NEC */
[all …]
/linux/drivers/net/wireless/zydas/zd1211rw/
H A Dzd_rf_uw2453.c21 * The data format is a 4 bit register address followed by a 20 bit value. */
28 * the configured frequency. During initialization, we run through a variety
29 * of different VCO configurations on channel 1 until we detect a PLL lock.
34 * If we do not see a PLL lock on any standard VCO config, we fall back on an
35 * autocal configuration, which has a fixed (as opposed to per-channel) VCO
55 RF_CHANNEL(14) = 0x4f,
75 RF_CHANNEL(14) = 0xccc,
79 * table a little by observing that both channels in a consecutive pair share
83 #define CHAN_TO_PAIRIDX(a) ((a - 1) / 2) argument
84 #define RF_CHANPAIR(a,b) [CHAN_TO_PAIRIDX(a)] argument
[all …]

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