| /linux/arch/arm/boot/dts/ti/omap/ |
| H A D | omap-zoom-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include "omap-gpmc-smsc911x.dtsi" 9 ranges = <3 0 0x10000000 0x1000000>, /* CS3: 16MB for UART */ 17 serial@3,0 { 19 reg = <3 0 8>; /* CS3, offset 0, IO size 8 */ 20 bank-width = <2>; 21 reg-shift = <1>; 22 reg-io-width = <1>; 23 interrupt-parent = <&gpio4>; 25 clock-frequency = <1843200>; [all …]
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| /linux/drivers/hwmon/ |
| H A D | ltc2947-core.c | 1 // SPDX-License-Identifier: GPL-2.0 12 #include <linux/hwmon-sysfs.h> 24 #define LTC2947_CONT_MODE_MASK BIT(3) 28 #define LTC2947_DIV_MASK GENMASK(7, 3) 34 #define LTC2947_ACCUM_POL_2_MASK GENMASK(3, 2) 66 #define VOLTAGE_MIN -300 77 #define CURRENT_MIN -30000 86 #define POWER_MIN -450000000 98 #define TEMP_MIN -40000 108 #define LTC2947_ALERTS_SIZE (LTC2947_REG_STATVDVCC - LTC2947_REG_STATUS) [all …]
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| /linux/drivers/pinctrl/mediatek/ |
| H A D | pinctrl-mt8186.c | 1 // SPDX-License-Identifier: GPL-2.0 9 #include "pinctrl-mtk-mt8186.h" 10 #include "pinctrl-paris.h" 14 * iocfg[3]:0x10002400, iocfg[4]:0x10002600, iocfg[5]:0x10002800, 45 PIN_FIELD_BASE(3, 3, 6, 0x0030, 0x10, 18, 1), 55 PIN_FIELD_BASE(13, 13, 3, 0x0040, 0x10, 0, 1), 56 PIN_FIELD_BASE(14, 14, 3, 0x0040, 0x10, 1, 1), 61 PIN_FIELD_BASE(19, 19, 5, 0x0050, 0x10, 3, 1), 88 PIN_FIELD_BASE(46, 46, 5, 0x0060, 0x10, 3, 1), 94 PIN_FIELD_BASE(52, 52, 3, 0x0040, 0x10, 18, 1), [all …]
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| H A D | pinctrl-mt6795.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include "pinctrl-mtk-mt6795.h" 8 #include "pinctrl-paris.h" 43 PIN_FIELD15(0, 196, 0x600, 0x10, 0, 3), 51 PINS_FIELD16(17, 19, 0x910, 0x10, 3, 1), 56 PINS_FIELD16(29, 32, 0x900, 0x10, 3, 1), 64 PINS_FIELD16(47, 61, 0x920, 0x10, 3, 1), 66 PINS_FIELD16(67, 67, 0x920, 0x10, 3, 1), 106 PINS_FIELD16(17, 19, 0x940, 0x10, 3, 1), 111 PINS_FIELD16(29, 32, 0x930, 0x10, 3, 1), [all …]
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| H A D | pinctrl-mt8188.c | 1 // SPDX-License-Identifier: GPL-2.0 9 #include "pinctrl-mtk-mt8188.h" 10 #include "pinctrl-paris.h" 14 * iocfg[3]:0x11e20000, iocfg[4]:0x11ea0000 46 PIN_FIELD_BASE(3, 3, 1, 0x0170, 0x10, 11, 1), 59 PIN_FIELD_BASE(16, 16, 3, 0x00d0, 0x10, 10, 1), 60 PIN_FIELD_BASE(17, 17, 3, 0x00d0, 0x10, 10, 1), 89 PIN_FIELD_BASE(46, 46, 3, 0x00d0, 0x10, 10, 1), 93 PIN_FIELD_BASE(50, 50, 3, 0x00d0, 0x10, 10, 1), 94 PIN_FIELD_BASE(51, 51, 3, 0x00d0, 0x10, 11, 1), [all …]
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | qcom,msm8976-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8976-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Bjorn Andersson <andersson@kernel.org> 11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 18 const: qcom,msm8976-pinctrl 26 gpio-reserved-ranges: 30 gpio-line-names: 31 maxItems: 145 [all …]
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| /linux/drivers/cpufreq/ |
| H A D | longhaul.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 6 * VIA-specific information 13 Reserved2:3, // 22:20 22 unsigned RevisionID:4, // 3:0 27 Reserved:3, // 11:13 32 Reserved2:3, // 27:25 59 -1, /* 0000 -> RESERVED */ 60 30, /* 0001 -> 3.0x */ 61 40, /* 0010 -> 4.0x */ 62 -1, /* 0011 -> RESERVED */ [all …]
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| /linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | renesas,dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Biju Das <biju.das.jz@bp.renesas.com> 18 - $ref: /schemas/display/dsi-controller.yaml# 23 - enum: 24 - renesas,r9a07g044-mipi-dsi # RZ/G2{L,LC} 25 - renesas,r9a07g054-mipi-dsi # RZ/V2L 26 - const: renesas,rzg2l-mipi-dsi 33 - description: Sequence operation channel 0 interrupt [all …]
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| /linux/drivers/pinctrl/uniphier/ |
| H A D | pinctrl-uniphier-ld11.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 // Copyright (C) 2016-2017 Socionext Inc. 12 #include "pinctrl-uniphier.h" 24 UNIPHIER_PINCTRL_PIN(3, "XNFWP", UNIPHIER_PIN_IECTRL_EXIST, 25 3, UNIPHIER_PIN_DRV_1BIT, 26 3, UNIPHIER_PIN_PULL_DOWN), 79 3, UNIPHIER_PIN_DRV_2BIT, 145 -1, UNIPHIER_PIN_DRV_FIXED4, 146 -1, UNIPHIER_PIN_PULL_NONE), 148 -1, UNIPHIER_PIN_DRV_FIXED4, [all …]
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| H A D | pinctrl-uniphier-pxs2.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 // Copyright (C) 2015-2017 Socionext Inc. 12 #include "pinctrl-uniphier.h" 24 UNIPHIER_PINCTRL_PIN(3, "ED3", UNIPHIER_PIN_IECTRL_NONE, 25 3, UNIPHIER_PIN_DRV_1BIT, 26 3, UNIPHIER_PIN_PULL_DOWN), 61 -1, UNIPHIER_PIN_DRV_FIXED8, 64 -1, UNIPHIER_PIN_DRV_FIXED8, 67 -1, UNIPHIER_PIN_DRV_FIXED8, 70 -1, UNIPHIER_PIN_DRV_FIXED8, [all …]
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| H A D | pinctrl-uniphier-ld6b.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 // Copyright (C) 2015-2017 Socionext Inc. 12 #include "pinctrl-uniphier.h" 24 UNIPHIER_PINCTRL_PIN(3, "ED3", UNIPHIER_PIN_IECTRL_NONE, 25 3, UNIPHIER_PIN_DRV_1BIT, 26 3, UNIPHIER_PIN_PULL_DOWN), 61 -1, UNIPHIER_PIN_DRV_FIXED8, 64 -1, UNIPHIER_PIN_DRV_FIXED8, 67 -1, UNIPHIER_PIN_DRV_FIXED8, 70 -1, UNIPHIER_PIN_DRV_FIXED8, [all …]
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| /linux/drivers/video/logo/ |
| H A D | logo_parisc_clut224.ppm | 2 # 224-color PA-RISC Linux logo 434 254 198 2 253 202 2 253 207 3 238 198 14 454 254 198 2 253 207 3 252 218 6 254 234 42 456 253 207 3 228 176 28 70 46 2 2 2 2 473 186 124 4 221 154 6 248 183 3 254 198 2 474 253 202 2 250 214 3 254 222 7 254 230 70 476 254 226 4 254 212 22 214 162 3 2 2 2 493 206 137 3 238 167 5 254 190 11 254 198 2 494 253 207 3 252 218 6 254 226 46 254 232 58 496 202 152 2 231 166 7 175 127 3 2 2 2 [all …]
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| /linux/drivers/pinctrl/intel/ |
| H A D | pinctrl-emmitsburg.c | 1 // SPDX-License-Identifier: GPL-2.0 16 #include "pinctrl-intel.h" 28 .size = ((e) - (s) + 1), \ 40 PINCTRL_PIN(3, "ESPI_IO_1"), 188 PINCTRL_PIN(145, "GLB_EXT_ACC_DISABLE"), 326 EBG_GPP(1, 136, 145), /* JTAG */ 338 EBG_GPP(3, 244, 261), /* GPP_N */ 344 EBG_COMMUNITY(2, 112, 145, ebg_community3_gpps), 345 EBG_COMMUNITY(3, 146, 183, ebg_community4_gpps), 365 .name = "emmitsburg-pinctrl",
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| H A D | pinctrl-merrifield.c | 1 // SPDX-License-Identifier: GPL-2.0 18 #include "pinctrl-intel.h" 19 #include "pinctrl-tangier.h" 27 PINCTRL_PIN(3, "ULPI_D2"), 62 /* Family 3: SDIO (20 pins) */ 177 PINCTRL_PIN(145, "GP13_PWM1"), 283 static const unsigned int mrfld_pwm1_pins[] = { 145 }; 327 TNG_FAMILY(3, 37, 56), 333 TNG_FAMILY(9, 127, 145), 362 .name = "pinctrl-merrifield", [all …]
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| /linux/Documentation/translations/zh_CN/core-api/ |
| H A D | cpu_hotplug.rst | 1 .. include:: ../disclaimer-zh_CN.rst 3 :Original: Documentation/core-api/cpu_hotplug.rst 79 hot-add/hot-remove。目前还没有定死规定。典型的用法是在启动时启动拓扑结构,这时 95 $ ls -lh /sys/devices/system/cpu 97 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu0 98 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu1 99 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu2 100 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu3 101 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu4 102 drwxr-xr-x 9 root root 0 Dec 21 16:33 cpu5 [all …]
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| /linux/include/dt-bindings/clock/ |
| H A D | qcom,ipq5332-gcc.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 12 #define GPLL2 3 145 #define GCC_USB0_PHY_CFG_AHB_CLK 145 166 #define GCC_APC0_VOLTAGE_DROOP_DETECTOR_BCR 3 308 #define GCC_WCSS_ECAHB_CLK_ARES 145
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| H A D | rk3328-cru.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 4 * Author: Elaine <zhangqing@rock-chips.com> 13 #define PLL_CPLL 3 116 #define ACLK_VOP 145 204 /* soft-reset indices */ 208 #define SRST_CORE3_PO 3 353 #define SRST_HDCP 145
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| H A D | qcom,gcc-ipq8074.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved. 12 #define BLSP1_QUP1_I2C_APPS_CLK_SRC 3 154 #define GCC_NSS_CFG_CLK 145 241 #define GCC_BLSP1_QUP2_BCR 3 383 #define GCC_NSSPORT6_RESET 145
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| H A D | hix5hd2-clock.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 13 #define HIX5HD2_FIXED_48M 3 66 #define HIX5HD2_I2C2_CLK 145
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| /linux/include/dt-bindings/pinctrl/ |
| H A D | mt6795-pinfunc.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 10 #include <dt-bindings/pinctrl/mt65xx.h> 21 #define PINMUX_GPIO1__FUNC_SDA4 (MTK_PIN_NO(1) | 3) 28 #define PINMUX_GPIO2__FUNC_SCL4 (MTK_PIN_NO(2) | 3) 32 #define PINMUX_GPIO3__FUNC_GPIO3 (MTK_PIN_NO(3) | 0) 33 #define PINMUX_GPIO3__FUNC_DSI1_TE (MTK_PIN_NO(3) | 1) 34 #define PINMUX_GPIO3__FUNC_I2S1_DO_1 (MTK_PIN_NO(3) | 2) 35 #define PINMUX_GPIO3__FUNC_SDA3 (MTK_PIN_NO(3) | 3) 36 #define PINMUX_GPIO3__FUNC_TDD_TDO (MTK_PIN_NO(3) | 4) 37 #define PINMUX_GPIO3__FUNC_URXD3 (MTK_PIN_NO(3) | 5) [all …]
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| H A D | mediatek,mt8188-pinfunc.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 15 #define PINMUX_GPIO0__FUNC_O_UTXD1 (MTK_PIN_NO(0) | 3) 24 #define PINMUX_GPIO1__FUNC_I1_URXD1 (MTK_PIN_NO(1) | 3) 33 #define PINMUX_GPIO2__FUNC_O_URTS1 (MTK_PIN_NO(2) | 3) 39 #define PINMUX_GPIO3__FUNC_B_GPIO3 (MTK_PIN_NO(3) | 0) 40 #define PINMUX_GPIO3__FUNC_B0_TP_GPIO3_AO (MTK_PIN_NO(3) | 1) 41 #define PINMUX_GPIO3__FUNC_B0_SPIM5_MISO (MTK_PIN_NO(3) | 2) 42 #define PINMUX_GPIO3__FUNC_I1_UCTS1 (MTK_PIN_NO(3) | 3) 43 #define PINMUX_GPIO3__FUNC_O_DMIC4_CLK (MTK_PIN_NO(3) | 4) 44 #define PINMUX_GPIO3__FUNC_I0_I2SIN_D0 (MTK_PIN_NO(3) | 5) [all …]
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| H A D | mt8186-pinfunc.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ 16 #define PINMUX_GPIO0__FUNC_I2S2_MCK (MTK_PIN_NO(0) | 3) 25 #define PINMUX_GPIO1__FUNC_I2S2_BCK (MTK_PIN_NO(1) | 3) 33 #define PINMUX_GPIO2__FUNC_I2S2_LRCK (MTK_PIN_NO(2) | 3) 38 #define PINMUX_GPIO3__FUNC_GPIO3 (MTK_PIN_NO(3) | 0) 39 #define PINMUX_GPIO3__FUNC_I2S0_DI (MTK_PIN_NO(3) | 1) 40 #define PINMUX_GPIO3__FUNC_SPI0_MI_B (MTK_PIN_NO(3) | 2) 41 #define PINMUX_GPIO3__FUNC_I2S2_DI (MTK_PIN_NO(3) | 3) 42 #define PINMUX_GPIO3__FUNC_SRCLKENAI1 (MTK_PIN_NO(3) | 4) 43 #define PINMUX_GPIO3__FUNC_SCP_SPI0_MI (MTK_PIN_NO(3) | 5) [all …]
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| /linux/drivers/media/v4l2-core/ |
| H A D | v4l2-vp9.c | 1 // SPDX-License-Identifier: GPL-2.0 12 #include <media/v4l2-vp9.h> 85 { 35, 21, 12, 161, 212, 207, 20, 23, 145 }, /*left = h */ 130 const u8 v4l2_vp9_kf_partition_probs[16][3] = { 131 /* 8x8 -> 4x4 */ 136 /* 16x16 -> 8x8 */ 141 /* 32x32 -> 16x16 */ 146 /* 64x64 -> 32x32 */ 150 { 12, 3, 3 }, /* a/l both split */ 162 { 120, 12, 32, 145, 195, 142, 32, 38, 86 }, /* y = d207 */ [all …]
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| /linux/drivers/media/dvb-frontends/ |
| H A D | or51211.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Support for OR51211 (pcHDTV HD-2000) - VSB 19 #define OR51211_DEFAULT_FIRMWARE "dvb-fe-or51211.fw" 68 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) { in i2c_writebytes() 70 return -EREMOTEIO; in i2c_writebytes() 85 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) { in i2c_readbytes() 87 return -EREMOTEIO; in i2c_readbytes() 96 struct or51211_state* state = fe->demodulator_priv; in or51211_load_firmware() 100 dprintk("Firmware is %zu bytes\n", fw->size); in or51211_load_firmware() 106 return -1; in or51211_load_firmware() [all …]
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | axis,artpec6-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/pci/axis,artpec6-pcie.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: Axis ARTPEC-6 PCIe host controller 11 - Jesper Nilsson <jesper.nilsson@axis.com> 21 - axis,artpec6-pcie 22 - axis,artpec6-pcie-ep 23 - axis,artpec7-pcie 24 - axis,artpec7-pcie-ep [all …]
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