| /freebsd/sys/contrib/device-tree/Bindings/net/wireless/ |
| H A D | mediatek,mt76.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Felix Fietkau <nbd@nbd.name>
12 - Lorenzo Bianconi <lorenzo@kernel.org>
13 - Ryder Lee <ryder.lee@mediatek.com>
25 - mediatek,mt76
26 - mediatek,mt7628-wmac
27 - mediatek,mt7622-wmac
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| /freebsd/usr.sbin/virtual_oss/virtual_oss/ |
| H A D | virtual_oss.8 | 2 .\" Copyright (c) 2017-2022 Hans Petter Selasky <hselasky@freebsd.org>
52 All channel numbers start at zero.
53 Left channel is zero and right channel is one.
56 .Bl -tag -width indent
69 Set default sample-rate for the subsequent commands.
75 The buffer size specified is per channel.
78 Set real-time priority to
87 Valid values range from -63 to 63 inclusivly.
96 Valid values range from -63 to 63 inclusivly.
101 Valid values range from -63 to 63 inclusivly.
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| /freebsd/sys/arm/freescale/imx/ |
| H A D | imx6_sdma.h | 1 /*-
27 #define SDMAARM_MC0PTR 0x00 /* ARM platform Channel 0 Pointer */
28 #define SDMAARM_INTR 0x04 /* Channel Interrupts */
29 #define SDMAARM_STOP_STAT 0x08 /* Channel Stop/Channel Status */
30 #define SDMAARM_HSTART 0x0C /* Channel Start */
31 #define SDMAARM_EVTOVR 0x10 /* Channel Event Override */
32 #define SDMAARM_DSPOVR 0x14 /* Channel BP Override */
33 #define SDMAARM_HOSTOVR 0x18 /* Channel ARM platform Override */
34 #define SDMAARM_EVTPEND 0x1C /* Channel Event Pending */
37 #define SDMAARM_INTRMASK 0x2C /* Channel ARM platform Interrupt Mask */
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| /freebsd/sys/contrib/device-tree/Bindings/dma/ |
| H A D | ste-dma40.txt | 4 - compatible: "stericsson,dma40"
5 - reg: Address range of the DMAC registers
6 - reg-names: Names of the above areas to use during resource look-up
7 - interrupt: Should contain the DMAC interrupt number
8 - #dma-cells: must be <3>
9 - memcpy-channels: Channels to be used for memcpy
12 - dma-channels: Number of channels supported by hardware - if not present
14 - disabled-channels: Channels which can not be used
18 dma: dma-controller@801c0000 {
19 compatible = "stericsson,db8500-dma40", "stericsson,dma40";
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| H A D | stericsson,dma40.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsso
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| H A D | ti-edma.txt | 3 The eDMA3 consists of two components: Channel controller (CC) and Transfer
5 responsible for the DMA channel handling, while the TCs are responsible to
8 ------------------------------------------------------------------------------
9 eDMA3 Channel Controller
12 --------------------
13 - compatible: Should be:
14 - "ti,edma3-tpcc" for the channel controller(s) on OMAP,
16 - "ti,k2g-edma3-tpcc", "ti,edma3-tpcc" for the
17 channel controller(s) on 66AK2G.
18 - #dma-cells: Should be set to <2>. The first number is the DMA request
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| H A D | atmel-xdma.txt | 5 - compatible: Should be "atmel,sama5d4-dma", "microchip,sam9x60-dma" or
6 "microchip,sama7g5-dma" or
7 "microchip,sam9x7-dma", "atmel,sama5d4-dma".
8 - reg: Should contain DMA registers location and length.
9 - interrupts: Should contain DMA interrupt.
10 - #dma-cell
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| H A D | cirrus,ep9301-dma-m2p.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/cirrus,ep9301-dma-m2p.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexander Sverdlin <alexander.sverdlin@gmail.com>
11 - Nikita Shubin <nikita.shubin@maquefel.me>
14 - $ref: dma-controller.yaml#
19 - const: cirrus,ep9301-dma-m2p
20 - items:
21 - enum:
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| H A D | mmp-dma.txt | 7 - compatible: Should be "marvell,pdma-1.0"
8 - reg: Should contain DMA registers location and length.
9 - interrupts: Either contain all of the per-channel DMA interrupts
13 - dma-channels: Number of DMA channels supported by the controller (defaults
15 - #dma-channels: deprecated
16 - dma-requests: Number of DMA requestor lines supported by the controller
18 - #dma-requests: deprecated
20 "marvell,pdma-1.0"
26 * Each channel has specific irq
27 * ICU parse out irq channel from ICU register,
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| /freebsd/sys/contrib/dev/rtw88/ |
| H A D | rtw8822b.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
26 ether_addr_copy(efuse->addr, map->e.mac_addr); in rtw8822be_efuse_parsing()
32 ether_addr_copy(efuse->addr, map->u.mac_addr); in rtw8822bu_efuse_parsing()
38 ether_addr_copy(efuse->addr, map->s.mac_addr); in rtw8822bs_efuse_parsing()
43 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8822b_read_efuse()
49 efuse->usb_mode_switch = u8_get_bits(map->usb_mode, BIT(7)); in rtw8822b_read_efuse()
50 efuse->rfe_option = map->rfe_option; in rtw8822b_read_efuse()
51 efuse->rf_board_option = map->rf_board_option; in rtw8822b_read_efuse()
52 efuse->crystal_cap = map->xtal_k; in rtw8822b_read_efuse()
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| /freebsd/sys/contrib/device-tree/Bindings/iio/adc/ |
| H A D | st,stm32-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 STM32 ADC is a successive approximation analog-to-digital converter.
13 stored in a left-aligned or right-aligned 32-bit data register.
17 voltage goes beyond the user-defined, higher or lower thresholds.
22 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
27 - st,stm32f4-adc-core
28 - st,stm32h7-adc-core
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| /freebsd/contrib/wpa/wpa_supplicant/ |
| H A D | op_classes.c | 6 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 for (i = 0; i < mode->num_channels; i++) { in allow_channel()
30 chan_is_6ghz = is_6ghz_freq(mode->channels[i].freq); in allow_channel()
31 if (is_6ghz == chan_is_6ghz && mode->channels[i].chan == chan) in allow_channel()
35 if (i == mode->num_channels || in allow_channel()
36 (mode->channels[i].flag & HOSTAPD_CHAN_DISABLED)) in allow_channel()
40 *flags = mode->channels[i].flag; in allow_channel()
42 if (mode->channels[i].flag & HOSTAPD_CHAN_NO_IR) in allow_channel()
49 static int get_center_80mhz(struct hostapd_hw_modes *mode, u8 channel, in get_center_80mhz() argument
54 if (mode->mode != HOSTAPD_MODE_IEEE80211A) in get_center_80mhz()
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| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | tlv320adcx140.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analo
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| H A D | ti,tlv320adcx140.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
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| /freebsd/sys/contrib/dev/iwlwifi/ |
| H A D | iwl-phy-db.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
3 * Copyright (C) 2005-2014, 2020-2021 Intel Corporation
10 #include "iwl-drv.h"
11 #include "iwl-phy-db.h"
12 #include "iwl-debug.h"
13 #include "iwl-op-mode.h"
14 #include "iwl-trans.h"
22 * struct iwl_phy_db - stores phy configuration and calibration data.
25 * @calib_nch: non channel specific calibration data.
26 * @n_group_papd: number of entries in papd channel group.
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| /freebsd/sys/contrib/device-tree/Bindings/firmware/ |
| H A D | arm,scmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sudeep Holla <sudeep.holla@arm.com>
26 - $ref: /schemas/firmware/nxp,imx95-scmi.yaml
34 - description: SCMI compliant firmware with mailbox transport
36 - const: arm,scmi
37 - description: SCMI compliant firmware with ARM SMC/HVC transport
39 - const: arm,scmi-smc
40 - description: SCMI compliant firmware with ARM SMC/HVC transport
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| /freebsd/sys/contrib/device-tree/src/arm/st/ |
| H A D | ste-ab8505.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/clock/ste-ab8500.h>
10 iio-hwmon {
11 compatible = "iio-hwmon";
12 io-channels = <&gpadc 0x02>, /* Battery temperature */
24 interrupt-parent = <&intc>;
26 interrupt-controller;
27 #interrupt-cells = <2>;
28 #address-cells = <1>;
29 #size-cells = <0>;
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| H A D | ste-ab8500.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/clock/ste-ab8500.h>
10 iio-hwmon {
11 compatible = "iio-hwmon";
12 io-channels = <&gpadc 0x02>, /* Battery temperature */
27 interrupt-parent = <&intc>;
29 interrupt-controller;
30 #interrupt-cells = <2>;
31 #address-cells = <1>;
32 #size-cells = <0>;
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| /freebsd/contrib/wpa/src/common/ |
| H A D | hw_features_common.c | 3 * Copyright (c) 2002-2013, Jouni Malinen <j@w1.fi>
30 for (i = 0; i < mode->num_channels; i++) { in hw_get_channel_chan()
31 struct hostapd_channel_data *ch = &mode->channels[i]; in hw_get_channel_chan()
32 if (ch->chan == chan) { in hw_get_channel_chan()
34 *freq = ch->freq; in hw_get_channel_chan()
48 for (i = 0; i < mode->num_channels; i++) { in hw_mode_get_channel()
49 struct hostapd_channel_data *ch = &mode->channels[i]; in hw_mode_get_channel()
51 if (ch->freq == freq) { in hw_mode_get_channel()
53 *chan = ch->chan; in hw_mode_get_channel()
78 if (curr_mode->mode != mode) in hw_get_channel_freq()
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| /freebsd/share/man/man4/ |
| H A D | snd_hdsp.4 | 35 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
57 .Bl -bullet -compact
59 RME HDSP 9632 (optional AO4S-192 and AIS-192 extension boards)
67 For ADAT ports, 8 channel, 4 channel and 2 channel formats are supported.
69 (32kHz-48kHz) and 4 channels at double speed (64kHz-96kHz).
70 Only the HDSP 9632 can operate at quad speed (128kHz-192kHz), ADAT is
72 Depending on sample rate and channel format selected, not all pcm channels can
79 .Bl -tag -width indent
82 When opened in multi-channel audio software, this makes all ports available
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| H A D | snd_hdspe.4 | 34 .Bd -ragged -offset indent
42 .Bd -literal -offset indent
56 .Bl -bullet -compact
58 RME HDSPe AIO (optional AO4S-192 and AI4S-192 extension boards)
66 For ADAT ports, 8 channel, 4 channel and 2 channel formats are supported.
68 (32kHz-48kHz), 4 channels at double speed (64kHz-96kHz), and 2 channels at
69 quad speed (128kHz-192kHz).
70 Depending on sample rate and channel format selected, not all pcm channels can
77 .Bl -tag -width indent
80 When opened in multi-channel audio software, this makes all ports available
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| /freebsd/sys/contrib/dev/iwlwifi/fw/api/ |
| H A D | scan.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
13 * enum iwl_scan_subcmd_ids - scan commands
33 * struct iwl_ssid_ie - directed scan network information element
37 * each channel may select different ssids from among the 20 entries.
78 * struct iwl_scan_offload_blocklist - SCAN_OFFLOAD_BLACKLIST_S
81 * @client_bitmap: clients ignore this entry - enum scan_framework_client
112 * struct iwl_scan_offload_profile - SCAN_OFFLOAD_PROFILE_S
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| /freebsd/sys/contrib/device-tree/Bindings/media/ |
| H A D | microchip,csi2dc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Eugen Hristev <eugen.hristev@microchip.com>
13 CSI2DC - Camera Serial Interface 2 Demux Controller
17 It filters IDI packets based on their data type and virtual channel
30 32-bit IDI interface or a parallel interface.
37 CSI2DC also supports direct access to the data through AHB, via DMA channel,
39 For data pipe to be available, a dma controller and a dma channel must be
44 const: microchip,sama7g5-csi2dc
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| /freebsd/sys/contrib/device-tree/Bindings/power/supply/ |
| H A D | stericsson,ab8500-charger.yaml | 1 # SPDX-License-Identifier: GPL-2.0
4 ---
5 $id: http://devicetree.org/schemas/power/supply/stericsson,ab8500-charger.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Sebastian Reichel <sre@kernel.org>
14 - $ref: power-supply.yaml#
18 const: stericsson,ab8500-charger
20 monitored-battery:
28 vddadc-supply:
36 maxItems: 14
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| /freebsd/sys/contrib/v4l/ |
| H A D | videodev.h | 55 int channel; member
59 #define VIDEO_VC_TUNER 1 /* Channel has a tuner */
60 #define VIDEO_VC_AUDIO 2 /* Channel has audio */
64 __u16 norm; /* Norm set by channel */
111 #define VIDEO_PALETTE_YUV411P 14 /* YUV 4:1:1 Planar */
120 int audio; /* Audio channel */
157 #define VIDEO_CLIP_BITMAP -1
182 unsigned int frame; /* Frame (0 - n) for double buffer */
202 #define VIDEO_NO_UNIT (-1)
255 #define VIDIOCGCHAN _IOWR('v',2,struct video_channel) /* Get channel info (sources) */
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