| /linux/arch/arm/boot/dts/nvidia/ |
| H A D | tegra30-cpu-opp-microvolt.dtsi | 205 opp-1300000000-1000 {
209 opp-1300000000-1025 {
213 opp-1300000000-1050 {
217 opp-1300000000-1075 {
221 opp-1300000000-1100 {
225 opp-1300000000-1125 {
229 opp-1300000000-1150 {
233 opp-1300000000-1175 {
|
| H A D | tegra30-cpu-opp.dtsi | 361 opp-1300000000-1000 {
365 opp-hz = /bits/ 64 <1300000000>;
368 opp-1300000000-1025 {
372 opp-hz = /bits/ 64 <1300000000>;
375 opp-1300000000-1050 {
383 opp-hz = /bits/ 64 <1300000000>;
386 opp-1300000000-1075 {
390 opp-hz = /bits/ 64 <1300000000>;
393 opp-1300000000-1100 {
396 opp-hz = /bits/ 64 <1300000000>;
[all …]
|
| /linux/Documentation/devicetree/bindings/cpufreq/ |
| H A D | imx-cpufreq-dt.txt | 31 opp-1300000000 {
32 opp-hz = /bits/ 64 <1300000000>;
|
| /linux/Documentation/devicetree/bindings/power/ |
| H A D | power_domain.txt | 85 domain1_opp_1: opp-1300000000 {
86 opp-hz = /bits/ 64 <1300000000>;
|
| /linux/arch/arm/boot/dts/samsung/ |
| H A D | exynos4212.dtsi | 118 opp-1300000000 {
119 opp-hz = /bits/ 64 <1300000000>;
|
| H A D | exynos5800.dtsi | 51 opp-1300000000 {
105 opp-1300000000 {
|
| H A D | exynos4412.dtsi | 144 opp-1300000000 {
145 opp-hz = /bits/ 64 <1300000000>;
|
| H A D | exynos5420.dtsi | 182 opp-1300000000 {
183 opp-hz = /bits/ 64 <1300000000>;
223 opp-1300000000 {
224 opp-hz = /bits/ 64 <1300000000>;
|
| H A D | exynos5250.dtsi | 140 opp-1300000000 {
141 opp-hz = /bits/ 64 <1300000000>;
|
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | fsl,plldig.yaml | 37 maximum: 1300000000
|
| /linux/Documentation/devicetree/bindings/opp/ |
| H A D | opp-v2.yaml | 247 opp-1300000000 {
248 opp-hz = /bits/ 64 <1300000000>;
|
| /linux/drivers/clk/tegra/ |
| H A D | clk-tegra30.c | 312 { 12000000, 1300000000, 975, 9, 1, 8 },
313 { 13000000, 1300000000, 1000, 10, 1, 8 },
314 { 16800000, 1300000000, 928, 12, 1, 8 }, /* actual: 1299.2 MHz */
315 { 19200000, 1300000000, 812, 12, 1, 8 }, /* actual: 1299.2 MHz */
316 { 26000000, 1300000000, 650, 13, 1, 8 },
|
| /linux/drivers/clk/ |
| H A D | clk-plldig.c | 35 #define PLLDIG_MAX_VCO_FREQ 1300000000
|
| H A D | clk-hsdk-pll.c | 71 { 1300000000, 1, 38, 0, 0, 0 },
|
| /linux/arch/arm64/boot/dts/exynos/ |
| H A D | exynos5433.dtsi | 278 opp-1300000000 {
279 opp-hz = /bits/ 64 <1300000000>;
320 opp-1300000000 {
321 opp-hz = /bits/ 64 <1300000000>;
|
| /linux/arch/arm64/boot/dts/socionext/ |
| H A D | uniphier-pxs3.dtsi | 123 opp-1300000000 {
124 opp-hz = /bits/ 64 <1300000000>;
|
| /linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt7622.dtsi | 81 clock-frequency = <1300000000>;
96 clock-frequency = <1300000000>;
|
| H A D | mt8173.dtsi | 76 opp-1300000000 {
77 opp-hz = /bits/ 64 <1300000000>;
|
| /linux/arch/arm/boot/dts/renesas/ |
| H A D | r8a7790.dtsi | 77 clock-frequency = <1300000000>;
99 clock-frequency = <1300000000>;
121 clock-frequency = <1300000000>;
143 clock-frequency = <1300000000>;
|
| /linux/drivers/clk/hisilicon/ |
| H A D | clk-hi3620.c | 74 { HI3620_PLL_GPU, "armpll5", NULL, 0, 1300000000, },
|
| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8mq.dtsi | 207 opp-1300000000 {
208 opp-hz = /bits/ 64 <1300000000>;
|
| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | r8a77961.dtsi | 104 opp-1300000000 {
105 opp-hz = /bits/ 64 <1300000000>;
|
| H A D | r8a77960.dtsi | 104 opp-1300000000 {
105 opp-hz = /bits/ 64 <1300000000>;
|
| /linux/sound/soc/fsl/ |
| H A D | fsl_xcvr.c | 71 { .mfi = 54, .mfn = 1, .mfd = 6, .fout = 1300000000, }, /* 1.3 GHz */
|
| /linux/drivers/clk/samsung/ |
| H A D | clk-exynos4.c | 1113 PLL_35XX_RATE(24 * MHZ, 1300000000, 325, 6, 0),
|