Home
last modified time | relevance | path

Searched full:1300000000 (Results 1 – 25 of 25) sorted by relevance

/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-cpu-opp-microvolt.dtsi205 opp-1300000000-1000 {
209 opp-1300000000-1025 {
213 opp-1300000000-1050 {
217 opp-1300000000-1075 {
221 opp-1300000000-1100 {
225 opp-1300000000-1125 {
229 opp-1300000000-1150 {
233 opp-1300000000-1175 {
H A Dtegra30-cpu-opp.dtsi361 opp-1300000000-1000 {
365 opp-hz = /bits/ 64 <1300000000>;
368 opp-1300000000-1025 {
372 opp-hz = /bits/ 64 <1300000000>;
375 opp-1300000000-1050 {
383 opp-hz = /bits/ 64 <1300000000>;
386 opp-1300000000-1075 {
390 opp-hz = /bits/ 64 <1300000000>;
393 opp-1300000000-1100 {
396 opp-hz = /bits/ 64 <1300000000>;
[all …]
/linux/Documentation/devicetree/bindings/cpufreq/
H A Dimx-cpufreq-dt.txt31 opp-1300000000 {
32 opp-hz = /bits/ 64 <1300000000>;
/linux/Documentation/devicetree/bindings/power/
H A Dpower_domain.txt85 domain1_opp_1: opp-1300000000 {
86 opp-hz = /bits/ 64 <1300000000>;
/linux/arch/arm/boot/dts/samsung/
H A Dexynos4212.dtsi118 opp-1300000000 {
119 opp-hz = /bits/ 64 <1300000000>;
H A Dexynos5800.dtsi51 opp-1300000000 {
105 opp-1300000000 {
H A Dexynos4412.dtsi144 opp-1300000000 {
145 opp-hz = /bits/ 64 <1300000000>;
H A Dexynos5420.dtsi182 opp-1300000000 {
183 opp-hz = /bits/ 64 <1300000000>;
223 opp-1300000000 {
224 opp-hz = /bits/ 64 <1300000000>;
/linux/Documentation/devicetree/bindings/clock/
H A Dfsl,plldig.yaml37 maximum: 1300000000
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623.dtsi65 opp-1300000000 {
66 opp-hz = /bits/ 64 <1300000000>;
85 clock-frequency = <1300000000>;
97 clock-frequency = <1300000000>;
109 clock-frequency = <1300000000>;
121 clock-frequency = <1300000000>;
/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v2.yaml247 opp-1300000000 {
248 opp-hz = /bits/ 64 <1300000000>;
/linux/drivers/clk/tegra/
H A Dclk-tegra30.c313 { 12000000, 1300000000, 975, 9, 1, 8 },
314 { 13000000, 1300000000, 1000, 10, 1, 8 },
315 { 16800000, 1300000000, 928, 12, 1, 8 }, /* actual: 1299.2 MHz */
316 { 19200000, 1300000000, 812, 12, 1, 8 }, /* actual: 1299.2 MHz */
317 { 26000000, 1300000000, 650, 13, 1, 8 },
/linux/drivers/clk/
H A Dclk-plldig.c35 #define PLLDIG_MAX_VCO_FREQ 1300000000
H A Dclk-hsdk-pll.c71 { 1300000000, 1, 38, 0, 0, 0 },
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7622.dtsi81 clock-frequency = <1300000000>;
96 clock-frequency = <1300000000>;
H A Dmt8173.dtsi76 opp-1300000000 {
77 opp-hz = /bits/ 64 <1300000000>;
/linux/arch/arm/boot/dts/renesas/
H A Dr8a7790.dtsi78 clock-frequency = <1300000000>;
100 clock-frequency = <1300000000>;
122 clock-frequency = <1300000000>;
144 clock-frequency = <1300000000>;
/linux/drivers/gpu/drm/msm/dsi/phy/
H A Ddsi_phy_7nm.c159 else if (pll_freq < 1300000000ULL) in dsi_pll_calc_dec_frac()
168 if (pll_freq <= 1300000000ULL) in dsi_pll_calc_dec_frac()
/linux/drivers/clk/hisilicon/
H A Dclk-hi3620.c74 { HI3620_PLL_GPU, "armpll5", NULL, 0, 1300000000, },
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77960.dtsi105 opp-1300000000 {
106 opp-hz = /bits/ 64 <1300000000>;
H A Dr8a77961.dtsi105 opp-1300000000 {
106 opp-hz = /bits/ 64 <1300000000>;
/linux/sound/soc/fsl/
H A Dfsl_xcvr.c71 { .mfi = 54, .mfn = 1, .mfd = 6, .fout = 1300000000, }, /* 1.3 GHz */
/linux/drivers/clk/samsung/
H A Dclk-exynos4.c1113 PLL_35XX_RATE(24 * MHZ, 1300000000, 325, 6, 0),
/linux/drivers/clk/rockchip/
H A Dclk-rk3576.c101 RK3588_PLL_RATE(1300000000, 3, 325, 2, 0),
/linux/drivers/clk/sprd/
H A Dsc9860-clk.c141 1000, 1000, 1, 1300000000);