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/linux/fs/btrfs/tests/
H A Dfree-space-tests.c430 * Extent entry covering free space range [128Mb - 256Kb, 128Mb - 128Kb[ in test_steal_space_from_bitmap_to_extent()
438 /* Bitmap entry covering free space range [128Mb + 512Kb, 256Mb[ */ in test_steal_space_from_bitmap_to_extent()
454 * [128Mb - 256Kb, 128Mb - 128Kb[ in test_steal_space_from_bitmap_to_extent()
455 * [128Mb + 512Kb, 128Mb + 768Kb[ in test_steal_space_from_bitmap_to_extent()
476 * Confirm that the bitmap range [128Mb + 768Kb, 256Mb[ isn't marked in test_steal_space_from_bitmap_to_extent()
486 * Confirm that the region [128Mb + 256Kb, 128Mb + 512Kb[, which is in test_steal_space_from_bitmap_to_extent()
495 * Confirm that the region [128Mb, 128Mb + 256Kb[, which is covered in test_steal_space_from_bitmap_to_extent()
504 * Now lets mark the region [128Mb, 128Mb + 512Kb[ as free too. But, in test_steal_space_from_bitmap_to_extent()
548 * Now mark the region [128Mb - 128Kb, 128Mb[ as free too. This will in test_steal_space_from_bitmap_to_extent()
550 * the free space [128Mb - 256Kb, 128Mb - 128Kb[. in test_steal_space_from_bitmap_to_extent()
[all …]
/linux/Documentation/arch/xtensa/
H A Dmmu.rst62 5. The parent-bus-address value is rounded down to the nearest 256MB boundary
64 6. The IO area covers the entire 256MB segment of parent-bus-address; the
83 | VMALLOC area | VMALLOC_START 0xc0000000 128MB - 64KB
96 | | (4MB * DCACHE_N_COLORS)
104 | Cached KSEG | XCHAL_KSEG_CACHED_VADDR 0xd0000000 128MB
106 | Uncached KSEG | XCHAL_KSEG_BYPASS_VADDR 0xd8000000 128MB
108 | Cached KIO | XCHAL_KIO_CACHED_VADDR 0xe0000000 256MB
110 | Uncached KIO | XCHAL_KIO_BYPASS_VADDR 0xf0000000 256MB
114 256MB cached + 256MB uncached layout::
126 | VMALLOC area | VMALLOC_START 0xa0000000 128MB - 64KB
[all …]
/linux/Documentation/arch/x86/x86_64/
H A Dmm.rst20 from TB to GB and then MB/KB.
32 …0000000000000000 | 0 | 00007fffffffefff | ~128 TB | user-space virtual memory, different …
33 00007ffffffff000 | ~128 TB | 00007fffffffffff | 4 kB | ... guard hole
36 …0000800000000000 | +128 TB | 7fffffffffffffff | ~8 EB | ... huge, almost 63 bits wide hole of…
48 … | | | | virtual memory addresses up to the -128 TB
55 …ffff800000000000 | -128 TB | ffff87ffffffffff | 8 TB | ... guard hole, also reserved for hyp…
77 …ffffffff80000000 | -2 GB | ffffffff9fffffff | 512 MB | kernel text mapping, mapped to physic…
78 ffffffff80000000 |-2048 MB | | |
79 ffffffffa0000000 |-1536 MB | fffffffffeffffff | 1520 MB | module mapping space
80 ffffffffff000000 | -16 MB | | |
[all …]
/linux/arch/mips/bcm47xx/
H A Dprom.c69 * want to reuse the memory used by CFE (around 4MB). That means cfe_* in prom_init_mem()
73 * BCM47XX uses 128MB for addressing the ram, if the system contains in prom_init_mem()
81 /* Accessing memory after 128 MiB will cause an exception */ in prom_init_mem()
82 max = 128 << 20; in prom_init_mem()
88 pr_debug("Assume 128MB RAM\n"); in prom_init_mem()
96 /* Ignoring the last page when ddr size is 128M. Cached in prom_init_mem()
98 * using address above 128M stepping out of the ddr address in prom_init_mem()
101 if (c->cputype == CPU_74K && (mem == (128 << 20))) in prom_init_mem()
150 if (lowmem != 128 << 20 || !highmem_region) in bcm47xx_prom_highmem_init()
157 * 0x80000000 0xc0000000 (1st: 256MB) in bcm47xx_prom_highmem_init()
[all …]
/linux/drivers/accel/habanalabs/include/gaudi2/
H A Dgaudi2.h16 #define CFG_BAR_SIZE 0x10000000ull /* 256MB */
21 #define CFG_SIZE 0x8000000ull /* 96MB CFG + 32MB DBG*/
22 #define CFG_REGION_SIZE 0xC000000ull /* 192MB */
24 #define STM_FLASH_BASE_ADDR 0x1000007FF4000000ull /* Not 256MB aligned */
25 #define STM_FLASH_ALIGNED_OFF 0x4000000ull /* 256 MB alignment */
26 #define STM_FLASH_SIZE 0x2000000ull /* 32MB */
29 #define SPI_FLASH_SIZE 0x1000000ull /* 16MB */
38 #define BAR0_RSRVD_SIZE 0x1000000ull /* 16MB */
41 #define SRAM_SIZE 0x3000000ull /* 48MB */
68 #define GAUDI2_MSIX_ENTRIES 128
[all …]
/linux/drivers/accel/habanalabs/include/gaudi/
H A Dgaudi.h15 #define SRAM_BAR_SIZE 0x4000000ull /* 64MB */
16 #define CFG_BAR_SIZE 0x8000000ull /* 128MB */
19 #define CFG_SIZE 0x4000000 /* 32MB CFG + 32MB DBG*/
22 #define SRAM_SIZE 0x1400000 /* 20MB */
59 #define DEVICE_CACHE_LINE_SIZE 128
/linux/arch/arm/mach-omap2/
H A Diomap.h60 #define L3_24XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
63 #define L4_24XX_SIZE SZ_1M /* 1MB of 128MB used, want 1MB sect */
106 #define L3_34XX_SIZE SZ_1M /* 44kB of 128MB used, want 1MB sect */
110 #define L4_34XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
119 #define L4_WK_AM33XX_SIZE SZ_4M /* 1MB of 128MB used, want 1MB sect */
254 * L4_WKUP_DRA7XX_PHYS (0x4AE0_0000<>0x4AE3_EFFF) -> .24 mb (alloc 1MiB)?
/linux/arch/arm/mach-rpc/include/mach/
H A Dmemory.h25 * Sparsemem support. Each section is a maximum of 64MB. The sections
26 * are offset by 128MB and can cover 128MB, so that gives us a maximum
/linux/arch/parisc/include/asm/
H A Dassembly.h14 #define FRAME_SIZE 128
21 #define CALLEE_REG_FRAME_SIZE 128
62 #define LDREGM ldd,mb
314 fldd,mb -8(\regs), %fr30
315 fldd,mb -8(\regs), %fr29
316 fldd,mb -8(\regs), %fr28
317 fldd,mb -8(\regs), %fr27
318 fldd,mb -8(\regs), %fr26
319 fldd,mb -8(\regs), %fr25
320 fldd,mb -8(\regs), %fr24
[all …]
/linux/Documentation/arch/x86/
H A Dmtrr.rst73 reg00: base=0x00000000 ( 0MB), size= 128MB: write-back, count=1
74 reg01: base=0x08000000 ( 128MB), size= 64MB: write-back, count=1
87 reg00: base=0x00000000 ( 0MB), size= 128MB: write-back, count=1
88 reg01: base=0x08000000 ( 128MB), size= 64MB: write-back, count=1
89 reg02: base=0xf8000000 (3968MB), size= 4MB: write-combining, count=1
124 reg00: base=0x00000000 ( 0MB), size= 64MB: write-back, count=1
125 reg01: base=0xfb000000 (4016MB), size= 16MB: write-combining, count=1
126 reg02: base=0xfb000000 (4016MB), size= 4kB: uncachable, count=1
/linux/Documentation/arch/riscv/
H A Dvm-layout.rst50 ffffffc4fea00000 | -236 GB | ffffffc4feffffff | 6 MB | fixmap
51 ffffffc4ff000000 | -236 GB | ffffffc4ffffffff | 16 MB | PCI io
54 … ffffffd600000000 | -168 GB | fffffff5ffffffff | 128 GB | direct mapping of all physical memory
76 …0000000000000000 | 0 | 00007fffffffffff | 128 TB | user-space virtual memory, different …
79 …0000800000000000 | +128 TB | ffff7fffffffffff | ~16M TB | ... huge, almost 64 bits wide hole of…
80 … | | | | virtual memory addresses up to the -128 TB
87 ffff8d7ffea00000 | -114.5 TB | ffff8d7ffeffffff | 6 MB | fixmap
88 ffff8d7fff000000 | -114.5 TB | ffff8d7fffffffff | 16 MB | PCI io
123 ff1bfffffea00000 | -57 PB | ff1bfffffeffffff | 6 MB | fixmap
124 ff1bffffff000000 | -57 PB | ff1bffffffffffff | 16 MB | PCI io
/linux/arch/x86/pci/
H A Dce4100.c38 #define MB (1024 * 1024) macro
98 DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write)
102 DEFINE_REG(4, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
103 DEFINE_REG(4, 1, 0x10, (128*KB), reg_init, reg_read, reg_write)
107 DEFINE_REG(8, 0, 0x10, (1*MB), reg_init, reg_read, reg_write)
110 DEFINE_REG(9, 0, 0x10 , (1*MB), reg_init, reg_read, reg_write)
113 DEFINE_REG(10, 0, 0x14, (256*MB), reg_init, reg_read, reg_write)
127 DEFINE_REG(12, 0, 0x10, (128*KB), reg_init, reg_read, reg_write)
142 DEFINE_REG(16, 0, 0x14, (64*MB), reg_init, reg_read, reg_write)
143 DEFINE_REG(16, 0, 0x18, (64*MB), reg_init, reg_read, reg_write)
[all …]
/linux/Documentation/translations/zh_CN/arch/riscv/
H A Dvm-layout.rst55 ffffffc6fee00000 | -228 GB | ffffffc6feffffff | 2 MB | fixmap
56 ffffffc6ff000000 | -228 GB | ffffffc6ffffffff | 16 MB | PCI io
80 0000000000000000 | 0 | 00007fffffffffff | 128 TB | 用户空间虚拟内存，每个内存管理器不同
83 0000800000000000 | +128 TB | ffff7fffffffffff | ~16M TB | ... 巨大的、几乎64位宽的直到内核映射的-128TB地方
91 ffff8d7ffee00000 | -114.5 TB | ffff8d7ffeffffff | 2 MB | fixmap
92 ffff8d7fff000000 | -114.5 TB | ffff8d7fffffffff | 16 MB | PCI io
/linux/arch/arm/boot/dts/aspeed/
H A Dopenbmc-flash-layout-128.dtsi14 reg = <0xe0000 0x20000>; // 128KB
19 reg = <0x100000 0x900000>; // 9MB
24 reg = <0xa00000 0x5600000>; // 86MB
29 reg = <0x6000000 0x2000000>; // 32MB
H A Dopenbmc-flash-layout-64.dtsi17 reg = <0xe0000 0x20000>; // 128KB
22 reg = <0x100000 0x900000>; // 9MB
27 reg = <0xa00000 0x2000000>; // 32MB
32 reg = <0x2a00000 0x1600000>; // 22MB
H A Dopenbmc-flash-layout-64-alt.dtsi17 reg = <0xe0000 0x20000>; // 128KB
22 reg = <0x100000 0x900000>; // 9MB
27 reg = <0xa00000 0x2000000>; // 32MB
32 reg = <0x2a00000 0x1600000>; // 22MB
/linux/drivers/media/pci/intel/ipu6/
H A Dipu6.h67 /* Physical pages in GDA is 128, page size is 2K for IPU6, 1K for others */
68 #define IPU6_DEVICE_GDA_NR_PAGES 128
101 #define IPU6_MAX_LI_BLOCK_ADDR 128
153 * One L2 block maps to 1024 L1 entries, hence points to 4MB address range
154 * 2 blocks per L2 stream means, 1 stream points to 8MB range
156 * As we need to clear the caches and 8MB being the biggest cache size, we need
157 * to have trash buffer which points to 8MB address range. As these trash
159 * amount of physical memory. So we reserve 8MB IOVA address range but only
160 * one page is reserved from physical memory. Each of this 8MB IOVA address
/linux/drivers/media/platform/samsung/s5p-mfc/
H A Dregs-mfc-v7.h36 #define MAX_CPB_SIZE_V7 (3 * SZ_1M) /* 3MB */
41 #define MFC_CHROMA_PAD_BYTES_V7 128
45 #define MFC_H264_DEC_CTX_BUF_SIZE_V7 (2 * SZ_1M) /* 2MB */
55 (((w) * 48) + 8192 + ((((w) + 1) / 2) * 128) + 144 + \
/linux/drivers/soc/atmel/
H A Dsoc.c99 "sam9x60 128MiB DDR2 SiP", "sam9x60"),
116 "sam9x75 16MB DDR2 SiP", "sam9x7"),
119 "sam9x75 64MB DDR2 SiP", "sam9x7"),
122 "sam9x75 125MB DDR3L SiP ", "sam9x7"),
125 "sam9x75 250MB DDR3L SiP", "sam9x7"),
157 "sama5d27c 128MiB SiP", "sama5d2"),
163 "sama5d27c 128MiB LPDDR2 SiP", "sama5d2"),
175 "sama5d28c 128MiB SiP", "sama5d2"),
178 "sama5d28c 128MiB LPDDR2 SiP", "sama5d2"),
/linux/arch/powerpc/include/asm/book3s/64/
H A Dhash-4k.h5 #define H_PTE_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps: 2^9 x 4KB = 2MB
6 #define H_PMD_INDEX_SIZE 7 // size: 8B << 7 = 1KB, maps: 2^7 x 2MB = 256MB
7 #define H_PUD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps: 2^9 x 256MB = 128GB
8 #define H_PGD_INDEX_SIZE 9 // size: 8B << 9 = 4KB, maps: 2^9 x 128GB = 64TB
/linux/Documentation/devicetree/bindings/pci/
H A Dv3,v360epc-pci.yaml35 The inbound ranges must be aligned to a 1MB boundary, and may be 1MB, 2MB,
36 4MB, 8MB, 16MB, 32MB, 64MB, 128MB, 256MB, 512MB, 1GB or 2GB in size. The
46 256MB (0x10000000) in size. The prefetchable memory window must be
75 …dma-ranges = <0x02000000 0 0x20000000 0x20000000 0 0x20000000>, /* EBI: 512 MB @ LB 20000000 1:1 */
/linux/arch/mips/include/asm/sgi/
H A Dgio.h20 * There is 10MB of GIO address space for GIO64 slot devices
23 * 0 GFX 0x1f000000 - 0x1f3fffff 4MB
24 * 1 EXP0 0x1f400000 - 0x1f5fffff 2MB
25 * 2 EXP1 0x1f600000 - 0x1f9fffff 4MB
29 * - MISC 0x1fb00000 - 0x1fbfffff 1MB
32 * - RESERVED 0x18000000 - 0x1effffff 112MB
38 * than 128 are 8 bits long, with the most significant 24 bits read from
/linux/Documentation/admin-guide/
H A Dramoops.rst67 machine with > 128 MB of memory, the following kernel command line will tell
68 the kernel to use only the first 128 MB of memory, and place ECC-protected
69 ramoops region at 128 MB boundary::
71 mem=128M ramoops.mem_address=0x8000000 ramoops.ecc=1
/linux/drivers/accel/habanalabs/goya/
H A DgoyaP.h66 #define CPU_FW_IMAGE_SIZE 0x10000000 /* 256MB */
67 #define MMU_PAGE_TABLES_SIZE 0x0FC00000 /* 252MB */
68 #define MMU_DRAM_DEFAULT_PAGE_SIZE 0x00200000 /* 2MB */
83 #error "Driver must reserve no more than 512MB"
131 #define VA_DDR_SPACE_END 0x2000000000ull /* 128GB */
133 VA_DDR_SPACE_START) /* 128GB */
136 #error "HL_CPU_ACCESSIBLE_MEM_SIZE must be exactly 2MB to enable MMU mapping"
/linux/arch/alpha/kernel/
H A Dsys_marvel.c120 mb(); in io7_enable_irq()
141 mb(); in io7_disable_irq()
184 mb(); in io7_redirect_irq()
201 mb(); in io7_redirect_one_lsi()
218 mb(); in io7_redirect_one_msi()
229 mb(); in init_one_io7_lsi()
240 mb(); in init_one_io7_msi()
276 for (i = 0; i < 128; ++i) { in init_io7_irqs()
290 for (i = 128; i < (128 + 512); ++i) { in init_io7_irqs()

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