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/freebsd/sys/contrib/device-tree/Bindings/phy/
H A Dmicrochip,sparx5-serdes.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steen Hegelund <steen.hegelund@microchip.com>
21 * Rx built-in fault detector (loss-of-lock/loss-of-signal)
22 * Adjustable tx de-emphasis (FFE)
31 The SERDES6G is a high-speed SERDES interface, which can operate at
34 * 100 Mbps (100BASE-FX)
35 * 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
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H A Dtransmit-amplitude.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/transmit-amplitude.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Binding describing the peak-to-peak transmit amplitude for common PHYs
14 - Marek Behún <kabel@kernel.org>
17 tx-p2p-microvolt:
19 Transmit amplitude voltages in microvolts, peak-to-peak. If this property
21 'tx-p2p-microvolt-names' property must be provided and contain
24 tx-p2p-microvolt-names:
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/freebsd/sys/net/
H A Dif_media.h3 /*-
4 * SPDX-License-Identifier: BSD-4-Clause
43 * Prototypes and definitions for BSD/OS-compatible network interface
67 * In-kernel representation of a single supported media type.
72 int ifm_data; /* for driver-specific use */
73 void *ifm_aux; /* for driver-specific use */
82 int ifm_media; /* current user-set media word */
118 * ---- -------
119 * 0-4 Media variant
120 * 5-7 Media type
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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dethernet-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
19 local-mac-address:
22 $ref: /schemas/types.yaml#/definitions/uint8-array
26 mac-address:
31 local-mac-address property.
32 $ref: /schemas/types.yaml#/definitions/uint8-array
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H A Dsff,sfp.txt1 Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP)
6 - compatible : must be one of
10 - i2c-bus : phandle of an I2C bus controller for the SFP two wire serial
15 - mod-def0-gpios : GPIO phandle and a specifier of the MOD-DEF0 (AKA Mod_ABS)
19 - los-gpios : GPIO phandle and a specifier of the Receiver Loss of Signal
22 - tx-fault-gpios : GPIO phandle and a specifier of the Module Transmitter
25 - tx-disable-gpios : GPIO phandle and a specifier of the Transmitter Disable
28 - rate-select0-gpios : GPIO phandle and a specifier of the Rx Signaling Rate
32 - rate-select1-gpios : GPIO phandle and a specifier of the Tx Signaling Rate
36 - maximum-power-milliwatt : Maximum module power consumption
[all …]
H A Dnvidia,tegra234-mgbe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/nvidia,tegra234-mgbe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra234 MGBE Multi-Gigabit Ethernet Controller
10 - Thierry Reding <treding@nvidia.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra234-mgbe
20 reg-names:
22 - const: hypervisor
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H A Dsff,sfp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Small Form Factor (SFF) Committee Small Form-factor Pluggable (SFP)
11 - Russell King <linux@armlinux.org.uk>
16 - sff,sfp # for SFP modules
17 - sff,sff # for soldered down SFF modules
19 i2c-bus:
24 maximum-power-milliwatt:
29 allowable by a module in the slot, in milli-Watts. Presently, modules can
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/freebsd/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth_kr.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
38 * Ethernet KR auto-neg and link-training driver API
43 * @brief Header file for KR driver
53 /* *INDENT-OFF* */
57 /* *INDENT-ON* */
59 /* AN (Auto-negotiation) Advertisement Registers */
247 * Initialize Auto-negotiation
248 * - Program Ability Registers (Advertisement Registers)
249 * - Clear Status latches
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/freebsd/sys/dev/vnic/
H A Dthunder_bgx.h99 #define SPU_STATUS2_RCVFLT (1UL << 10)
118 #define SPU_MISC_CTL_INTLV_RDISP (1UL << 10)
175 /* MSI-X interrupts */
242 QLM_MODE_10G_KR_4X1, /* 4 10GBASE-KR, 1 lane each */
243 QLM_MODE_40G_KR4_1X4, /* 1 40GBASE-KR4, 4 lanes each */
/freebsd/sys/dev/ixl/
H A Dixl_pf_main.c3 Copyright (c) 2013-2018, Intel Corporation
115 "CL108 RS-FEC",
116 "CL74 FC-FEC/BASE-R",
127 * ixl_set_state - Set the specified state
141 * ixl_clear_state - Clear the specified state
155 * ixl_test_state - Test the specified state
170 * ixl_testandset_state - Test and set the specified state
193 u8 oem_ver = (u8)(hw->nvm.oem_ver >> 24); in ixl_nvm_version_str()
194 u16 oem_build = (u16)((hw->nvm.oem_ver >> 16) & 0xFFFF); in ixl_nvm_version_str()
195 u8 oem_patch = (u8)(hw->nvm.oem_ver & 0xFF); in ixl_nvm_version_str()
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/freebsd/sys/dev/axgbe/
H A Dxgbe-phy-v2.c2 * AMD 10Gb Ethernet driver
116 #include "xgbe-common.h"
142 /* Rate-change complete wait/retry count */
145 /* CDR delay values for KR support (in usec) */
151 #define XGBE_RRC_FREQUENCY 10
275 * Optical specification compliance - denotes wavelength
306 ((_x)->extd[XGBE_SFP_EXTD_SFF_8472] && \
307 !((_x)->extd[XGBE_SFP_EXTD_DIAG] & XGBE_SFP_EXTD_DIAG_ADDR_CHANGE))
314 #define XGBE_BEL_FUSE_VENDOR "BEL-FUSE "
315 #define XGBE_BEL_FUSE_PARTNO "1GBT-SFP06 "
[all …]
/freebsd/sys/dev/ixgbe/
H A Dixgbe_82599.c2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
63 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_init_mac_link_ops_82599()
71 if ((mac->ops.get_media_type(hw) == ixgbe_media_type_fiber) && in ixgbe_init_mac_link_ops_82599()
73 mac->ops.disable_tx_laser = in ixgbe_init_mac_link_ops_82599()
75 mac->ops.enable_tx_laser = in ixgbe_init_mac_link_ops_82599()
77 mac->ops.flap_tx_laser = ixgbe_flap_tx_laser_multispeed_fiber; in ixgbe_init_mac_link_ops_82599()
80 mac->ops.disable_tx_laser = NULL; in ixgbe_init_mac_link_ops_82599()
81 mac->ops.enable_tx_laser = NULL; in ixgbe_init_mac_link_ops_82599()
82 mac->ops.flap_tx_laser = NULL; in ixgbe_init_mac_link_ops_82599()
[all …]
H A Dif_ix.c3 Copyright (c) 2001-2017, Intel Corporation
48 static const char ixgbe_driver_version[] = "4.0.1-k";
93 "Intel(R) X520-T 82599 LOM"),
105 "Intel(R) X520-1 82599EN (SFP+)"),
107 "Intel(R) X520-4 82599 (Quad SFP+)"),
109 "Intel(R) X520-Q1 82599 (QSFP+)"),
111 "Intel(R) X540-AT2"),
112 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X540T1, "Intel(R) X540-T1"),
113 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T, "Intel(R) X550-T2"),
114 PVID(IXGBE_INTEL_VENDOR_ID, IXGBE_DEV_ID_X550T1, "Intel(R) X550-T1"),
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/freebsd/share/misc/
H A Dpci_vendors5 # Date: 2024-11-25 03:15:02
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-2500TX V3 Ethernet
41 7a09 PCI-to-PCI Bridge
50 7a19 PCI-to-PCI Bridge
55 7a29 PCI-to-PCI Bridge
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/freebsd/sys/dev/bxe/
H A Dbxe_elink.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved.
328 bit15=link,bit12=duplex,bits11:10=speed,bit14=acknowledge.
508 /* When this pin is active high during reset, 10GBASE-T core is power
509 * down, When it is active low the 10GBASE-T is power up
750 #define MDIO_REG_GPHY_SHADOW_LED_SEL1 (0x0d << 10)
751 #define MDIO_REG_GPHY_SHADOW_LED_SEL2 (0x0e << 10)
753 #define MDIO_REG_GPHY_SHADOW_AUTO_DET_MED (0x1e << 10)
774 #define I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1)
[all …]
H A Decore_hsi.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved.
145 /* Up to 16 bytes of NULL-terminated string */
164 (if multiple found, priority order is: NC-SI, UMP, IPMI) */
169 /* Use SPIO4 as an arbiter between: 0-NC_SI, 1-IPMI
170 (can only be used when an add-in board, not BMC, pulls-down SPIO4) */
172 /* Use SPIO4 as an arbiter between: 0-UMP, 1-IPMI
173 (can only be used when an add-in board, not BMC, pulls-down SPIO4) */
175 /* Use SPIO4 as an arbiter between: 0-NC-SI, 1-UMP
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
116 … (0x1<<9) // Fast back-to-back transaction ena…
118 … (0x1<<10) // INTx assertion d…
119 …IEIP_REG_PCIEEP_CMD_I_DIS_E5_SHIFT 10
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