Home
last modified time | relevance | path

Searched +full:1000 +full:hz (Results 1 – 25 of 1066) sorted by relevance

12345678910>>...43

/linux/kernel/time/
H A Dtimeconst.bc43 define timeconst(hz) {
45 print "/* Time conversion constants for HZ == ", hz, " */\n"
54 print "#if HZ != ", hz, "\n"
55 print "#error \qinclude/generated/timeconst.h has the wrong HZ value!\q\n"
58 if (hz < 2) {
59 print "#error Totally bogus HZ value!\n"
61 s=fmuls(32,1000,hz)
63 print "#define HZ_TO_MSEC_MUL32\tU64_C(0x", fmul(s,1000,hz), ")\n"
64 print "#define HZ_TO_MSEC_ADJ32\tU64_C(0x", fadj(s,1000,hz), ")\n"
68 s=fmuls(32,hz,1000)
[all …]
H A Dclocksource-wdtest.c99 schedule_timeout_uninterruptible(HZ / 10); in wdtest_ktime_clocksource_reset()
100 clocksource_register_khz(&clocksource_wdtest_ktime, 1000 * 1000); in wdtest_ktime_clocksource_reset()
111 schedule_timeout_uninterruptible(holdoff * HZ); in wdtest_func()
122 schedule_timeout_uninterruptible(HZ); in wdtest_func()
133 clocksource_register_khz(&clocksource_wdtest_ktime, 1000 * 1000); in wdtest_func()
141 "Expected at least 1000ns, got %lu.\n", j2 - j1); in wdtest_func()
154 schedule_timeout_uninterruptible(2 * HZ); in wdtest_func()
164 schedule_timeout_uninterruptible(2 * HZ); in wdtest_func()
[all...]
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra30-peripherals-opp.dtsi59 opp-hz = /bits/ 64 <12750000>;
64 opp-12750000-1000 {
66 opp-hz = /bits/ 64 <12750000>;
73 opp-hz = /bits/ 64 <12750000>;
80 opp-hz = /bits/ 64 <25500000>;
85 opp-25500000-1000 {
87 opp-hz = /bits/ 64 <25500000>;
94 opp-hz = /bits/ 64 <25500000>;
101 opp-hz = /bits/ 64 <27000000>;
106 opp-27000000-1000 {
[all …]
H A Dtegra20-peripherals-opp.dtsi49 opp-hz = /bits/ 64 <36000000>;
56 opp-hz = /bits/ 64 <47500000>;
63 opp-hz = /bits/ 64 <50000000>;
70 opp-hz = /bits/ 64 <54000000>;
77 opp-hz = /bits/ 64 <57000000>;
84 opp-hz = /bits/ 64 <100000000>;
91 opp-hz = /bits/ 64 <108000000>;
98 opp-hz = /bits/ 64 <126666000>;
105 opp-hz = /bits/ 64 <150000000>;
112 opp-hz = /bits/ 64 <190000000>;
[all …]
H A Dtegra20-cpu-opp.dtsi11 opp-hz = /bits/ 64 <216000000>;
18 opp-hz = /bits/ 64 <216000000>;
25 opp-hz = /bits/ 64 <312000000>;
31 opp-hz = /bits/ 64 <312000000>;
37 opp-hz = /bits/ 64 <456000000>;
44 opp-hz = /bits/ 64 <456000000>;
50 opp-hz = /bits/ 64 <456000000>;
56 opp-hz = /bits/ 64 <608000000>;
62 opp-hz = /bits/ 64 <608000000>;
68 opp-hz = /bits/ 64 <608000000>;
[all …]
H A Dtegra124-peripherals-opp.dtsi9 opp-hz = /bits/ 64 <12750000>;
15 opp-hz = /bits/ 64 <12750000>;
21 opp-hz = /bits/ 64 <12750000>;
27 opp-hz = /bits/ 64 <12750000>;
33 opp-hz = /bits/ 64 <20400000>;
39 opp-hz = /bits/ 64 <20400000>;
45 opp-hz = /bits/ 64 <20400000>;
51 opp-hz = /bits/ 64 <20400000>;
57 opp-hz = /bits/ 64 <40800000>;
63 opp-hz = /bits/ 64 <40800000>;
[all …]
H A Dtegra30-cpu-opp.dtsi11 opp-hz = /bits/ 64 <51000000>;
17 opp-hz = /bits/ 64 <51000000>;
23 opp-hz = /bits/ 64 <51000000>;
29 opp-hz = /bits/ 64 <102000000>;
35 opp-hz = /bits/ 64 <102000000>;
41 opp-hz = /bits/ 64 <102000000>;
47 opp-hz = /bits/ 64 <204000000>;
54 opp-hz = /bits/ 64 <204000000>;
61 opp-hz = /bits/ 64 <204000000>;
68 opp-hz = /bits/ 64 <312000000>;
[all …]
/linux/kernel/
H A DKconfig.hz11 to have the timer interrupt run at 1000 Hz but 100 Hz may be more
16 environment leading to NR_CPUS * HZ number of timer interrupts
21 bool "100 HZ"
23 100 Hz is a typical choice for servers, SMP and NUMA systems
28 bool "250 HZ"
30 250 Hz is a good compromise choice allowing server performance
33 or multimedia, selected 300Hz instead.
36 bool "300 HZ"
38 300 Hz is a good compromise choice allowing server performance
44 bool "1000 HZ"
[all …]
/linux/arch/arm/include/asm/
H A Ddelay.h11 #include <asm/param.h> /* HZ */
20 * jiffies_per_sec = HZ
23 * Therefore the constant part is HZ / 1000000 which is a small
32 * UDELAY_MULT = 2^31 * HZ / 1000000
33 * = (2^31 / 1000000) * HZ
34 * = 2147.483648 * HZ
35 * = 2147 * HZ + 483648 * HZ / 1000000
38 * delay_us * UDELAY_MULT assuming HZ <= 1000 and delay_us <= 2000.
41 #define UDELAY_MULT UL(2147 * HZ + 483648 * HZ / 1000000)
65 * of 2000us. Further limits: HZ<=1000
[all …]
/linux/arch/riscv/lib/
H A Ddelay.c24 * jiffies_per_sec = HZ
27 * Therefore the constant part is HZ / 1000000 which is a small
36 * UDELAY_MULT = 2^31 * HZ / 1000000
37 * = (2^31 / 1000000) * HZ
38 * = 2147.483648 * HZ
39 * = 2147 * HZ + 483648 * HZ / 1000000
42 * delay_us * UDELAY_MULT assuming HZ <= 1000 and delay_us <= 2000.
45 #define MAX_UDELAY_HZ 1000
46 #define UDELAY_MULT (2147UL * HZ + 483648UL * HZ / 1000000UL)
49 #if HZ > MAX_UDELAY_HZ
[all …]
/linux/drivers/video/fbdev/core/
H A Dfbmon.c333 tmp *= 1000; in get_chroma()
339 tmp *= 1000; in get_chroma()
345 tmp *= 1000; in get_chroma()
351 tmp *= 1000; in get_chroma()
357 tmp *= 1000; in get_chroma()
363 tmp *= 1000; in get_chroma()
369 tmp *= 1000; in get_chroma()
375 tmp *= 1000; in get_chroma()
418 DPRINTK(" 720x400@70Hz\n"); in get_est_timing()
423 DPRINTK(" 720x400@88Hz\n"); in get_est_timing()
[all …]
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132-peripherals-opp.dtsi10 opp-hz = /bits/ 64 <12750000>;
16 opp-hz = /bits/ 64 <12750000>;
22 opp-hz = /bits/ 64 <12750000>;
28 opp-hz = /bits/ 64 <12750000>;
34 opp-hz = /bits/ 64 <20400000>;
40 opp-hz = /bits/ 64 <20400000>;
46 opp-hz = /bits/ 64 <20400000>;
52 opp-hz = /bits/ 64 <20400000>;
58 opp-hz = /bits/ 64 <40800000>;
64 opp-hz = /bits/ 64 <40800000>;
[all …]
/linux/drivers/cpufreq/
H A Dsh-cpufreq.c39 return (clk_get_rate(&per_cpu(sh_cpuclk, cpu)) + 500) / 1000; in sh_cpufreq_get()
57 /* Convert target_freq from kHz to Hz */ in __sh_cpufreq_target()
58 freq = clk_round_rate(cpuclk, target->freq * 1000); in __sh_cpufreq_target()
60 if (freq < (policy->min * 1000) || freq > (policy->max * 1000)) in __sh_cpufreq_target()
63 dev_dbg(dev, "requested frequency %u Hz\n", target->freq * 1000); in __sh_cpufreq_target()
66 freqs.new = (freq + 500) / 1000; in __sh_cpufreq_target()
73 dev_dbg(dev, "set frequency %lu Hz\n", freq); in __sh_cpufreq_target()
100 policy->min = (clk_round_rate(cpuclk, 1) + 500) / 1000; in sh_cpufreq_verify()
101 policy->max = (clk_round_rate(cpuclk, ~0UL) + 500) / 1000; in sh_cpufreq_verify()
130 (clk_round_rate(cpuclk, 1) + 500) / 1000; in sh_cpufreq_cpu_init()
[all …]
/linux/arch/loongarch/include/asm/
H A Ddelay.h18 #if HZ >= 1000
20 #elif HZ <= 200
23 #define MAX_UDELAY_MS (1000 / HZ)
/linux/arch/mips/include/asm/
H A Ddelay.h24 #if HZ >= 1000
26 #elif HZ <= 200
29 #define MAX_UDELAY_MS (1000 / HZ)
/linux/Documentation/fb/
H A Dviafb.modes10 # 640x480, 60 Hz, Non-Interlaced (25.175 MHz dotclock)
14 # Scan Frequency 31.469 kHz 59.94 Hz
29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
35 # 640x480, 75 Hz, Non-Interlaced (31.50 MHz dotclock)
39 # Scan Frequency 37.500 kHz 75.00 Hz
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
56 # 640x480, 85 Hz, Non-Interlaced (36.000 MHz dotclock)
60 # Scan Frequency 43.269 kHz 85.00 Hz
74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz
[all …]
/linux/drivers/gpu/drm/amd/display/modules/freesync/
H A Dfreesync.c34 /* Refresh rate ramp at a fixed rate of 65 Hz/second */
35 #define STATIC_SCREEN_RAMP_DELTA_REFRESH_RATE_PER_FRAME ((1000 / 60) * 65)
107 ((unsigned int)(div64_u64((1000000000ULL * 1000), in calc_duration_in_us_from_refresh_in_uhz()
196 stream->timing.h_total), 1000); in calc_v_total_from_duration()
226 (1000 + div64_u64(((unsigned long long)( in update_v_total_for_static_ramp()
234 (1000 - frame_duration_ratio)), 1000); in update_v_total_for_static_ramp()
237 * standard frame duration (frame duration at 60 Hz refresh rate). in update_v_total_for_static_ramp()
272 stream->timing.h_total), 1000); in update_v_total_for_static_ramp()
447 + (1000*FIXED_REFRESH_EXIT_MARGIN_IN_HZ)); in apply_fixed_refresh()
632 /* PB7 = FreeSync Minimum refresh rate (Hz) */ in build_vrr_infopacket_data_v1()
[all …]
/linux/Documentation/scheduler/
H A Dsched-nice-design.rst14 units were driven by the HZ tick, so the smallest timeslice was 1/HZ.
44 HZ=1000 it caused 1 jiffy to be 1 msec, which meant 0.1% CPU usage which
51 So for HZ=1000 we changed nice +19 to 5msecs, because that felt like the
53 But the fundamental HZ-sensitive property for nice+19 still remained,
59 within the constraints of HZ and jiffies and their nasty design level
91 enough), the scheduler was decoupled from 'time slice' and HZ concepts
94 support: with the new scheduler nice +19 tasks get a HZ-independent
/linux/drivers/leds/
H A Dleds-clevo-mail.c122 * start it. Let's blink the led slowly (0.5Hz). in clevo_mail_led_blink()
124 *delay_on = 1000; /* ms */ in clevo_mail_led_blink()
125 *delay_off = 1000; /* ms */ in clevo_mail_led_blink()
130 /* blink the led with 1Hz */ in clevo_mail_led_blink()
134 } else if (*delay_on == 1000 /* ms */ && *delay_off == 1000 /* ms */) { in clevo_mail_led_blink()
135 /* blink the led with 0.5Hz */ in clevo_mail_led_blink()
/linux/sound/pci/hda/
H A Dhda_beep.c18 DIGBEEP_HZ_STEP = 46875, /* 46.875 Hz */
19 DIGBEEP_HZ_MIN = 93750, /* 93.750 Hz */
56 * defined from the 8bit tone parameter, in Hz,
58 * that is from 12kHz to 93.75Hz in steps of 46.875 Hz
60 static int beep_linear_tone(struct hda_beep *beep, int hz) in beep_linear_tone() argument
62 if (hz <= 0) in beep_linear_tone()
64 hz *= 1000; /* fixed point */ in beep_linear_tone()
65 hz = hz - DIGBEEP_HZ_MIN in beep_linear_tone()
67 if (hz < 0) in beep_linear_tone()
68 hz = 0; /* turn off PC beep*/ in beep_linear_tone()
[all …]
/linux/arch/m68k/include/asm/
H A Ddelay.h53 #define HZSCALE (268435456 / (1000000 / HZ))
67 __delay(xloops * HZ); in __xdelay()
100 * 1000 / ((((HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6) is the number of
103 * So n / ( 1000 / ((((HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6) ) would
114 #define HZSCALE (268435456 / (1000000 / HZ))
121 1000)); in ndelay()
/linux/arch/alpha/
H A DKconfig97 Mikasa AS 1000
98 Noritake AS 1000A, AS 600A, AS 800
163 AlphaServer 1000-based Alpha systems.
174 AlphaServer 1000A, AlphaServer 600A, and AlphaServer 800-based
449 prompt "Timer interrupt frequency (HZ)?"
463 bool "32 Hz"
465 bool "64 Hz"
467 bool "128 Hz"
469 bool "256 Hz"
471 bool "1024 Hz"
[all …]
/linux/drivers/iio/accel/
H A Dst_accel_core.c130 { .hz = 1, .value = 0x01, },
131 { .hz = 10, .value = 0x02, },
132 { .hz = 25, .value = 0x03, },
133 { .hz = 50, .value = 0x04, },
134 { .hz = 100, .value = 0x05, },
135 { .hz = 200, .value = 0x06, },
136 { .hz = 400, .value = 0x07, },
137 { .hz = 1600, .value = 0x08, },
156 .gain = IIO_G_TO_M_S_2(1000),
212 { .hz = 50, .value = 0x00, },
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dqcm2290.dtsi782 opp-peak-kBps = <(200 * 4 * 1000)>;
786 opp-peak-kBps = <(300 * 4 * 1000)>;
790 opp-peak-kBps = <(451 * 4 * 1000)>;
794 opp-peak-kBps = <(547 * 4 * 1000)>;
798 opp-peak-kBps = <(681 * 4 * 1000)>;
802 opp-peak-kBps = <(768 * 4 * 1000)>;
806 opp-peak-kBps = <(1017 * 4 * 1000)>;
810 opp-peak-kBps = <(1353 * 4 * 1000)>;
814 opp-peak-kBps = <(1555 * 4 * 1000)>;
818 opp-peak-kBps = <(1804 * 4 * 1000)>;
[all …]
/linux/drivers/net/wireless/mediatek/mt76/
H A Dmt76x02_dfs.h27 #define MT_DFS_SW_TIMEOUT (HZ / 20)
28 #define MT_DFS_EVENT_WINDOW (HZ / 5)
34 #define MT_DFS_FCC_MAX_PRI ((28570 << 1) + 1000)
36 #define MT_DFS_JP_MAX_PRI ((80000 << 1) + 1000)
38 #define MT_DFS_ETSI_MAX_PRI (133333 + 125000 + 117647 + 1000)

12345678910>>...43