Home
last modified time | relevance | path

Searched +full:1 +full:- +full:v0 (Results 1 – 25 of 491) sorted by relevance

12345678910>>...20

/linux/arch/arm64/crypto/
H A Dsm4-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * https://tools.ietf.org/id/draft-ribose-cfrg-sm4-10.html
13 #include "sm4-ce-asm.h"
15 .arch armv8-a+crypto
17 .irp b, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \
45 * x0: 128-bit key
51 ld1 {v0.16b}, [x0];
52 rev32 v0.16b, v0.16b;
55 ld1 {v24.16b-v27.16b}, [x4], #64;
56 ld1 {v28.16b-v31.16b}, [x4];
[all …]
H A Daes-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2013 - 2017 Linaro Ltd <ard.biesheuvel@linaro.org>
9 .arch armv8-a+crypto
13 ld1 {v0.16b}, [x2]
22 1: aese v0.16b, v2.16b
23 aesmc v0.16b, v0.16b
25 aese v0.16b, v3.16b
26 aesmc v0.16b, v0.16b
29 aese v0.16b, v1.16b
30 aesmc v0.16b, v0.16b
[all …]
H A Daes-modes.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm64/crypto/aes-modes.S - chaining mode wrappers for AES
5 * Copyright (C) 2013 - 2017 Linaro Ltd <ard.biesheuvel@linaro.org>
8 /* included by aes-ce.S and aes-neon.S */
26 encrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7
31 decrypt_block4x v0, v1, v2, v3, w3, x2, x8, w7
37 encrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7
42 decrypt_block5x v0, v1, v2, v3, v4, w3, x2, x8, w7
62 ld1 {v0.16b-v3.16b}, [x1], #64 /* get 4 pt blocks */
66 st1 {v0.16b-v3.16b}, [x0], #64
[all …]
H A Dsm4-ce-gcm-core.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * SM4-GCM AEAD Algorithm using ARMv8 Crypto Extensions
14 #include "sm4-ce-asm.h"
16 .arch armv8-a+crypto
18 .irp b, 0, 1, 2, 3, 24, 25, 26, 27, 28, 29, 30, 31
37 * output: r0:r1 (low 128-bits in r0, high in r1)
41 pmull r0.1q, m0.1d, m1.1d; \
42 pmull T1.1q, m0.1d, T0.1d; \
43 pmull2 T0.1q, m0.2d, T0.2d; \
44 pmull2 r1.1q, m0.2d, m1.2d; \
[all …]
H A Dsm3-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * sm3-ce-core.S - SM3 secure hash using ARMv8.2 Crypto Extensions
12 .irp b, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12
46 shl \t1\().4s, \t0\().4s, #1
63 round \ab, \s0, v12, v11, 1
79 ld1 {v8.4s-v9.4s}, [x0]
89 0: ld1 {v0.16b-v3.16b}, [x1], #64
90 sub w2, w2, #1
95 CPU_LE( rev32 v0.16b, v0.16b )
102 qround a, v0, v1, v2, v3, v4
[all …]
H A Dsm4-ce-ccm-core.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * SM4-CCM AEAD Algorithm using ARMv8 Crypto Extensions
13 #include "sm4-ce-asm.h"
15 .arch armv8-a+crypto
17 .irp b, 0, 1, 8, 9, 10, 11, 12, 13, 14, 15, 16, 24, 25, 26, 27, 28, 29, 30, 31
32 mov vctr.d[1], x8; \
34 adds x8, x8, #1; \
57 ld1 {v0.16b-v3.16b}, [x2], #64
60 eor RMAC.16b, RMAC.16b, v0.16b
72 sub w3, w3, #1
[all …]
/linux/arch/mips/include/asm/mach-cavium-octeon/
H A Dkernel-entry-init.h6 * Copyright (C) 2005-2008 Cavium Networks, Inc
14 #define CP0_DCACHE_ERR_REG $27, 1
25 # a2 = 1 if init core, zero otherwise
30 dmfc0 v0, CP0_CVMMEMCTL_REG
32 dins v0, $0, 0, 6
33 ori v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE
34 dmtc0 v0, CP0_CVMMEMCTL_REG # Write the cavium mem control register
35 dmfc0 v0, CP0_CVMCTL_REG # Read the cavium control register
38 or v0, v0, 0x5001
39 xor v0, v0, 0x1001
[all …]
/linux/drivers/gpu/drm/amd/amdkfd/
H A Dcwsr_trap_handler_gfx10.asm26 * cpp -DASIC_FAMILY=CHIP_NAVI10 cwsr_trap_handler_gfx10.asm -P -o nv1x.sp3
27 * sp3 nv1x.sp3 -hex nv1x.hex
30 * cpp -DASIC_FAMILY=CHIP_SIENNA_CICHLID cwsr_trap_handler_gfx10.asm -P -o gfx10.sp3
31 * sp3 gfx10.sp3 -hex gfx10.hex
34 * cpp -DASIC_FAMILY=CHIP_PLUM_BONITO cwsr_trap_handler_gfx10.asm -P -o gfx11.sp3
35 * sp3 gfx11.sp3 -hex gfx11.hex
38 * cpp -DASIC_FAMILY=CHIP_GFX12 cwsr_trap_handler_gfx10.asm -P -o gfx12.sp3
39 * sp3 gfx12.sp3 -hex gfx12.hex
53 #define SINGLE_STEP_MISSED_WORKAROUND 1 //workaround for lost MODE.DEBUG_EN exception when SAVECTX …
56 #define S_COHERENCE glc:1
[all …]
/linux/tools/testing/selftests/powerpc/math/
H A Dvmx_asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 # Should be safe from C, only touches r4, r5 and v0,v1,v2
13 li r3,1 # assume a bad result
15 lvx v0,r5,r4
16 vcmpequd. v1,v0,v20
20 lvx v0,r5,r4
21 vcmpequd. v1,v0,v21
25 lvx v0,r5,r4
26 vcmpequd. v1,v0,v22
30 lvx v0,r5,r4
[all …]
/linux/arch/powerpc/crypto/
H A Dcrc32-vpmsum_core.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
16 * 32 bits of 0s to the end - this matches what a CRC does. We just
28 #include <asm/ppc-opcode.h>
66 std r31,-8(r1)
67 std r30,-16(r1)
68 std r29,-24(r1)
69 std r28,-32(r1)
70 std r27,-40(r1)
71 std r26,-48(r1)
72 std r25,-56(r1)
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/device/
H A Dctrl.c38 struct nvif_control_pstate_info_v0 v0; in nvkm_control_mthd_pstate_info() member
40 struct nvkm_clk *clk = ctrl->device->clk; in nvkm_control_mthd_pstate_info()
41 int ret = -ENOSYS; in nvkm_control_mthd_pstate_info()
43 nvif_ioctl(&ctrl->object, "control pstate info size %d\n", size); in nvkm_control_mthd_pstate_info()
44 if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) { in nvkm_control_mthd_pstate_info()
45 nvif_ioctl(&ctrl->object, "control pstate info vers %d\n", in nvkm_control_mthd_pstate_info()
46 args->v0.version); in nvkm_control_mthd_pstate_info()
51 args->v0.count = clk->state_nr; in nvkm_control_mthd_pstate_info()
52 args->v0.ustate_ac = clk->ustate_ac; in nvkm_control_mthd_pstate_info()
53 args->v0.ustate_dc = clk->ustate_dc; in nvkm_control_mthd_pstate_info()
[all …]
H A Duser.c51 return -EINVAL; in nvkm_udevice_info_subdev()
57 return -ENODEV; in nvkm_udevice_info_subdev()
64 if (args->mthd & NV_DEVICE_INFO_UNIT) { in nvkm_udevice_info_v1()
65 if (nvkm_udevice_info_subdev(device, args->mthd, &args->data)) in nvkm_udevice_info_v1()
66 args->mthd = NV_DEVICE_INFO_INVALID; in nvkm_udevice_info_v1()
69 args->mthd = NV_DEVICE_INFO_INVALID; in nvkm_udevice_info_v1()
75 struct nvkm_object *object = &udev->object; in nvkm_udevice_info()
76 struct nvkm_device *device = udev->device; in nvkm_udevice_info()
77 struct nvkm_fb *fb = device->fb; in nvkm_udevice_info()
78 struct nvkm_instmem *imem = device->imem; in nvkm_udevice_info()
[all …]
/linux/lib/
H A Dsiphash.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2 /* Copyright (C) 2016-2022 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
4 * SipHash: a fast short-input PRF
7 * This implementation is specifically for SipHash2-4 for a secure PRF
8 * and HalfSipHash1-3/SipHash1-3 for an insecure PRF only suitable for
17 #include <asm/word-at-a-time.h>
20 #define SIPROUND SIPHASH_PERMUTATION(v0, v1, v2, v3)
23 u64 v0 = SIPHASH_CONST_0; \
28 v3 ^= key->key[1]; \
29 v2 ^= key->key[0]; \
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Duoutp.c35 struct nvkm_ior *ior = outp->ior; in nvkm_uoutp_mthd_dp_mst_vcpi()
38 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uoutp_mthd_dp_mst_vcpi()
39 return -ENOSYS; in nvkm_uoutp_mthd_dp_mst_vcpi()
40 if (!ior->func->dp || !ior->func->dp->vcpi || !nvkm_head_find(outp->disp, args->v0.head)) in nvkm_uoutp_mthd_dp_mst_vcpi()
41 return -EINVAL; in nvkm_uoutp_mthd_dp_mst_vcpi()
43 ior->func->dp->vcpi(ior, args->v0.head, args->v0.start_slot, args->v0.num_slots, in nvkm_uoutp_mthd_dp_mst_vcpi()
44 args->v0.pbn, args->v0.aligned_pbn); in nvkm_uoutp_mthd_dp_mst_vcpi()
53 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uoutp_mthd_dp_mst_id_put()
54 return -ENOSYS; in nvkm_uoutp_mthd_dp_mst_id_put()
55 if (!outp->func->dp.mst_id_put) in nvkm_uoutp_mthd_dp_mst_id_put()
[all …]
/linux/arch/mips/kernel/
H A Dscall32-o32.S6 * Copyright (C) 1995-99, 2000- 02, 06 Ralf Baechle <ralf@linux-mips.org>
22 #include <asm/asm-offsets.h>
51 bltz t4, bad_stack # -> sp is bad
81 * syscall number is in v0 unless we called syscall(__NR_###)
84 subu t2, v0, __NR_O32_Linux
85 bnez t2, 1f /* __NR_syscall at offset 0 */
88 1:
89 LONG_S v0, TI_SYSCALL($28) # Save v0 as syscall number
95 bnez t0, syscall_trace_entry # -> yes
97 subu v0, v0, __NR_O32_Linux # check syscall number
[all …]
H A Dbmips_5xxx_init.S7 * Copyright (C) 2011-2012 by Broadcom Corporation
31 subu t2, linesize, 1 ; \
34 addiu t1, t1, -1 ; \
59 #define CP0_BRCM_MODE $22, 1
63 #define CP0_ICACHE_DATA_LO $28, 1
67 #define CP0_ICACHE_DATA_HI $29, 1
70 #define CP0_BRCM_MODE_Luc_MASK (1 << 11)
71 #define CP0_BRCM_CONFIG0_CWF_MASK (1 << 20)
72 #define CP0_BRCM_CONFIG0_TSE_MASK (1 << 19)
73 #define CP0_BRCM_MODE_SET_MASK (1 << 7)
[all …]
H A Dscall64-o32.S6 * Copyright (C) 1995 - 2000, 2001 by Ralf Baechle
13 * to ABI64 calling convention. 64-bit syscalls are also processed
36 dsubu t0, v0, __NR_O32_Linux # check syscall number
43 move a1, v0
83 * absolute syscall number is in v0 unless we called syscall(__NR_###)
86 * only defined when compiling with -mabi=32 (CONFIG_32BIT)
90 subu t2, v0, __NR_O32_Linux
91 bnez t2, 1f /* __NR_syscall at offset 0 */
94 1:
95 LONG_S v0, TI_SYSCALL($28) # Save v0 as syscall number
[all …]
/linux/tools/testing/selftests/net/netfilter/
H A Drpath.sh2 # SPDX-License-Identifier: GPL-2.0
8 if iptables-legacy --version >/dev/null 2>&1; then
9 iptables='iptables-legacy'
10 elif iptables --version >/dev/null 2>&1; then
16 if ip6tables-legacy --version >/dev/null 2>&1; then
17 ip6tables='ip6tables-legacy'
18 elif ip6tables --version >/dev/null 2>&1; then
24 if nft --version >/dev/null 2>&1; then
30 if [ -z "$iptables$ip6tables$nft" ]; then
35 sfx=$(mktemp -u "XXXXXXXX")
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/core/
H A Dioctl.c36 return -ENOSYS; in nvkm_ioctl_nop()
44 if ( object->func->uevent && in nvkm_ioctl_sclass_()
45 !object->func->uevent(object, NULL, 0, NULL) && index-- == 0) { in nvkm_ioctl_sclass_()
46 oclass->ctor = nvkm_uevent_new; in nvkm_ioctl_sclass_()
47 oclass->base.minver = 0; in nvkm_ioctl_sclass_()
48 oclass->base.maxver = 0; in nvkm_ioctl_sclass_()
49 oclass->base.oclass = NVIF_CLASS_EVENT; in nvkm_ioctl_sclass_()
53 if (object->func->sclass) in nvkm_ioctl_sclass_()
54 return object->func->sclass(object, index, oclass); in nvkm_ioctl_sclass_()
56 return -ENOSYS; in nvkm_ioctl_sclass_()
[all …]
/linux/drivers/platform/x86/
H A Dacerhdf.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * acerhdf - A driver which monitors the temperature
7 * (C) 2009 - Peter Kaestle peter (a) piie.net
12 * o acerfand - Rachel Greenham
13 * o acer_ec.pl - Michael Kurz michi.kurz (at) googlemail.com
14 * - Petr Tomasek tomasek (#) etf,cuni,cz
15 * - Carlos Corbacho cathectic (at) gmail.com
16 * o lkml - Matthew Garrett
17 * - Borislav Petkov
18 * - Andreas Mohr
[all …]
/linux/arch/mips/lib/
H A Dstrncpy_user.S12 #include <asm/asm-offsets.h>
22 * Returns: -EFAULT if exception before terminator, N if the entire
38 1: EX(lbue, v0, (v1), .Lfault)
41 1: EX(lbu, v0, (v1), .Lfault)
43 PTR_ADDIU v1, 1
45 sb v0, (a0)
46 beqz v0, 2f
47 PTR_ADDIU t0, 1
48 PTR_ADDIU a0, 1
49 bne t0, a2, 1b
[all …]
/linux/tools/testing/selftests/bpf/
H A Dtest_xdp_features.sh2 # SPDX-License-Identifier: GPL-2.0
4 readonly NS="ns1-$(mktemp -u XXXXXX)"
8 readonly V1_IP6=2001:db8::1
10 ret=1
16 ip link add v1 type veth peer name v0 netns ${NS}
21 ip -n ${NS} link set dev v0 up
22 ip -n ${NS} addr add $V0_IP4/24 dev v0
23 ip -n ${NS} addr add $V0_IP6/64 nodad dev v0
26 ethtool -K v1 gro on
27 ethtool -K v1 tx-checksumming off
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Duchan.c44 struct nvkm_chan *chan = nvkm_uchan(object)->chan; in nvkm_uchan_uevent()
45 struct nvkm_runl *runl = chan->cgrp->runl; in nvkm_uchan_uevent()
50 if (argc != sizeof(args->v0) || args->v0.version != 0) in nvkm_uchan_uevent()
51 return -ENOSYS; in nvkm_uchan_uevent()
53 switch (args->v0.type) { in nvkm_uchan_uevent()
55 return nvkm_uevent_add(uevent, &runl->fifo->nonstall.event, runl->id, in nvkm_uchan_uevent()
58 return nvkm_uevent_add(uevent, &runl->chid->event, chan->id, in nvkm_uchan_uevent()
64 return -ENOSYS; in nvkm_uchan_uevent()
78 struct nvkm_chan *chan = uobj->chan; in nvkm_uchan_object_fini_1()
79 struct nvkm_cctx *cctx = uobj->cctx; in nvkm_uchan_object_fini_1()
[all …]
/linux/arch/powerpc/lib/
H A Dmemcpy_power7.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 /* 0 == don't use VMX, 1 == use VMX */
26 std r3,-STACKFRAMESIZE+STK_REG(R31)(r1)
40 clrldi r6,r6,(64-3)
42 bf cr7*4+3,1f
44 addi r4,r4,1
46 addi r3,r3,1
48 1: bf cr7*4+2,2f
54 2: bf cr7*4+1,3f
65 stdu r1,-STACKFRAMESIZE(r1)
[all …]
/linux/tools/testing/selftests/powerpc/copyloops/
H A Dmemcpy_power7.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 /* 0 == don't use VMX, 1 == use VMX */
26 std r3,-STACKFRAMESIZE+STK_REG(R31)(r1)
40 clrldi r6,r6,(64-3)
42 bf cr7*4+3,1f
44 addi r4,r4,1
46 addi r3,r3,1
48 1: bf cr7*4+2,2f
54 2: bf cr7*4+1,3f
65 stdu r1,-STACKFRAMESIZE(r1)
[all …]

12345678910>>...20