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/freebsd/sys/dev/ath/ath_hal/ar9003/
H A Dar9300_btcoex.h24 #define AR9300_BT_WGHT 0xcccc4444
25 #define AR9300_STOMP_ALL_WLAN_WGHT0 0xfffffff0
26 #define AR9300_STOMP_ALL_WLAN_WGHT1 0xfffffff0
27 #define AR9300_STOMP_LOW_WLAN_WGHT0 0x88888880
28 #define AR9300_STOMP_LOW_WLAN_WGHT1 0x88888880
29 #define AR9300_STOMP_NONE_WLAN_WGHT0 0x00000000
30 #define AR9300_STOMP_NONE_WLAN_WGHT1 0x00000000
32 #define AR9300_STOMP_ALL_FORCE_WLAN_WGHT0 0xffffffff
33 #define AR9300_STOMP_ALL_FORCE_WLAN_WGHT1 0xffffffff
35 #define AR9300_STOMP_LOW_FORCE_WLAN_WGHT0 0x88888888
[all …]
/freebsd/contrib/file/magic/Magdir/
H A Dmotorola8 0 beshort 0520 mc68k COFF
11 >12 belong >0 not stripped
17 0 beshort 0521 mc68k executable (shared)
18 >12 belong >0 not stripped
19 0 beshort 0522 mc68k executable (shared demand paged)
20 >12 belong >0 not stripped
23 0 leshort 0x0268
24 >16 leshort 0
25 >>0 use display-coff
30 0 beshort 0554 68K BCS executable
[all …]
H A Dpbf9 0 belong&0xfffffff0 0
10 >4 beshort 0x0A09
/freebsd/sys/arm/xilinx/
H A Dzy7_mp.c47 #define ZYNQ7_CPU1_ENTRY 0xfffffff0
49 #define SCU_CONTROL_REG 0xf8f00000
51 #define SCU_CONFIG_REG 0xf8f00004
54 #define SLCR_PSS_IDCODE 0xf8000530
63 if (mp_ncpus != 0) in zynq7_mp_setmaxid()
67 if (bus_space_map(fdtbus_bs_tag, SLCR_PSS_IDCODE, 4, 0, in zynq7_mp_setmaxid()
68 &slcr_handle) != 0) in zynq7_mp_setmaxid()
71 device_id = bus_space_read_4(fdtbus_bs_tag, slcr_handle, 0) & in zynq7_mp_setmaxid()
83 mp_maxid = 0; in zynq7_mp_setmaxid()
89 if (bus_space_map(fdtbus_bs_tag, SCU_CONFIG_REG, 4, 0, in zynq7_mp_setmaxid()
[all …]
/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_freebsd_inc.h8 #define ATH_DRIVER_SIM 0 /* SIM */
9 #define ATH_WOW 0 /* Wake on Wireless */
11 #define ATH_SUPPORT_AIC 0 /* XXX to do with btcoex? */
12 #define AH_NEED_TX_DATA_SWAP 0 /* TX descriptor swap? */
13 #define AH_NEED_RX_DATA_SWAP 0 /* TX descriptor swap? */
14 #define ATH_SUPPORT_WIRESHARK 0 /* Radiotap HAL code */
15 #define AH_SUPPORT_WRITE_EEPROM 0 /* EEPROM write support */
16 #define ATH_SUPPORT_WAPI 0 /* China WAPI support */
18 #define ATH_SUPPORT_RAW_ADC_CAPTURE 0 /* Raw ADC capture support */
19 #define ATH_TRAFFIC_FAST_RECOVER 0 /* XXX not sure yet */
[all …]
/freebsd/lib/csu/i386/
H A Dcrt1_s.S36 .cfi_def_cfa_offset 0
40 andl $0xfffffff0,%esp # align stack
/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_pcie_w_reg.h51 /* [0x0] */
53 /* [0x4] */
55 /* [0x8] */
58 /* [0x10] */
63 /* [0x0] */
65 /* [0x4] */
67 /* [0x8] */
70 /* [0x10] */
72 /* [0x14] */
74 /* [0x18] */
[all …]
H A Dal_hal_udma_regs_s2m.h59 /* [0x0] Data write master configuration */
61 /* [0x4] Data write master configuration */
63 /* [0x8] Descriptor read master configuration */
65 /* [0xc] Descriptor read master configuration */
67 /* [0x10] Completion write master configuration */
69 /* [0x14] Completion write master configuration */
71 /* [0x18] Data write master configuration */
73 /* [0x1c] Descriptors read master configuration */
75 /* [0x20] Completion descriptors write master configuration */
77 /* [0x24] AXI outstanding read configuration */
[all …]
H A Dal_hal_udma_regs_m2s.h59 /* [0x0] Completion write master configuration */
61 /* [0x4] Completion write master configuration */
63 /* [0x8] Data read master configuration */
65 /* [0xc] Data read master configuration */
67 /* [0x10] Descriptor read master configuration */
69 /* [0x14] Descriptor read master configuration */
71 /* [0x18] Data read master configuration */
73 /* [0x1c] Descriptors read master configuration */
75 /* [0x20] Descriptors write master configuration (completion) */
77 /* [0x24] AXI outstanding configuration */
[all …]
/freebsd/sys/contrib/ck/include/
H A Dck_pflock.h49 #define CK_PFLOCK_LSB 0xFFFFFFF0
50 #define CK_PFLOCK_RINC 0x100 /* Reader increment value. */
51 #define CK_PFLOCK_WBITS 0x3 /* Writer bits in reader. */
52 #define CK_PFLOCK_PRES 0x2 /* Writer present bit. */
53 #define CK_PFLOCK_PHID 0x1 /* Phase ID bit. */
55 #define CK_PFLOCK_INITIALIZER {0, 0, 0, 0}
61 pf->rin = 0; in ck_pflock_init()
62 pf->rout = 0; in ck_pflock_init()
63 pf->win = 0; in ck_pflock_init()
64 pf->wout = 0; in ck_pflock_init()
[all …]
/freebsd/libexec/rtld-elf/i386/
H A Drtld_start.S40 andl $0xfffffff0,%esp # Align stack pointer
/freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/DWARF/
H A DDWARFDataExtractor.h3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
44 : DataExtractor(Other.getData().substr(0, Length), Other.isLittleEndian(), in DWARFDataExtractor()
49 /// value smaller than 0xfffffff0, or the value 0xffffffff followed by a
51 /// encoded in the field. In case of errors, it returns {0, DWARF32} and
85 uint64_t AbsPosOffset = 0) const;
/freebsd/sys/contrib/device-tree/Bindings/perf/
H A Driscv,pmu.yaml78 value of variant must be 0xffffffff_ffffffff.
104 riscv,event-to-mhpmevent = <0x0000B 0x0000 0x0001>;
105 riscv,event-to-mhpmcounters = <0x00001 0x00001 0x00000001>,
106 <0x00002 0x00002 0x0000000
[all...]
/freebsd/contrib/libarchive/libarchive/
H A Darchive_read_support_filter_zstd.c116 unsigned zstd_magic = 0xFD2FB528U; in zstd_bidder_bid()
117 unsigned zstd_magic_skippable_start = 0x184D2A50U; in zstd_bidder_bid()
118 unsigned zstd_magic_skippable_mask = 0xFFFFFFF0; in zstd_bidder_bid()
124 return (0); in zstd_bidder_bid()
132 return (0); in zstd_bidder_bid()
198 state->eof = 0; in zstd_bidder_init()
199 state->in_frame = 0; in zstd_bidder_init()
216 out = (ZSTD_outBuffer) { state->out_block, state->out_block_size, 0 }; in zstd_filter_read()
232 if (avail_in < 0) { in zstd_filter_read()
235 if (in.src == NULL && avail_in == 0) { in zstd_filter_read()
[all …]
/freebsd/sys/dev/sk/
H A Dyukonreg.h19 #define YUKON_GPSR 0x0000
21 #define YU_GPSR_SPEED 0x8000 /* speed 0 - 10Mbps, 1 - 100Mbps */
22 #define YU_GPSR_DUPLEX 0x4000 /* 0 - half duplex, 1 - full duplex */
23 #define YU_GPSR_FCTL_TX 0x2000 /* Tx flow control, 1 - disabled */
24 #define YU_GPSR_LINK 0x1000 /* link status (down/up) */
25 #define YU_GPSR_PAUSE 0x0800 /* flow control enable/disable */
26 #define YU_GPSR_TX_IN_PROG 0x0400 /* transmit in progress */
27 #define YU_GPSR_EXCESS_COL 0x0200 /* excessive collisions occurred */
28 #define YU_GPSR_LATE_COL 0x0100 /* late collision occurred */
29 #define YU_GPSR_MII_PHY_STC 0x0020 /* MII PHY status change */
[all …]
/freebsd/sys/fs/udf/
H A Dudf_vfsops.c144 sizeof(unicode_t), NULL, NULL, NULL, NULL, 0, 0); in udf_init()
147 NULL, NULL, NULL, NULL, 0, 0); in udf_init()
150 sizeof(struct udf_dirstream), NULL, NULL, NULL, NULL, 0, 0); in udf_init()
152 return 0; in udf_init()
174 return (0); in udf_uninit()
207 if (!error && fspec[len - 1] != '\0') in udf_mount()
211 return (0); in udf_mount()
[all...]
/freebsd/sys/dev/agp/
H A Dagpreg.h35 #define AGP_APBASE PCIR_BAR(0)
40 #define AGP_CAPID 0x0
41 #define AGP_STATUS 0x4
42 #define AGP_COMMAND 0x8
43 #define AGP_STATUS_AGP3 0x0008
44 #define AGP_STATUS_RQ_MASK 0xff000000
45 #define AGP_COMMAND_RQ_MASK 0xff000000
46 #define AGP_STATUS_ARQSZ_MASK 0xe000
47 #define AGP_COMMAND_ARQSZ_MASK 0xe000
48 #define AGP_STATUS_CAL_MASK 0x1c00
[all …]
H A Dagp_amd64.c84 agp_find_caps(dev) == 0) in agp_amd64_match()
88 case 0x74541022: in agp_amd64_match()
90 case 0x07551039: in agp_amd64_match()
92 case 0x07601039: in agp_amd64_match()
94 case 0x168910b9: in agp_amd64_match()
96 case 0x00d110de: in agp_amd64_match()
97 if (agp_amd64_nvidia_match(0x00d2)) in agp_amd64_match()
100 case 0x00e110de: in agp_amd64_match()
101 if (agp_amd64_nvidia_match(0x00e2)) in agp_amd64_match()
104 case 0x02041106: in agp_amd64_match()
[all …]
/freebsd/sys/dev/gve/
H A Dgve_adminq.h42 GVE_ADMINQ_DESCRIBE_DEVICE = 0x1,
43 GVE_ADMINQ_CONFIGURE_DEVICE_RESOURCES = 0x2,
44 GVE_ADMINQ_REGISTER_PAGE_LIST = 0x3,
45 GVE_ADMINQ_UNREGISTER_PAGE_LIST = 0x4,
46 GVE_ADMINQ_CREATE_TX_QUEUE = 0x5,
47 GVE_ADMINQ_CREATE_RX_QUEUE = 0x6,
48 GVE_ADMINQ_DESTROY_TX_QUEUE = 0x7,
49 GVE_ADMINQ_DESTROY_RX_QUEUE = 0x8,
50 GVE_ADMINQ_DECONFIGURE_DEVICE_RESOURCES = 0x9,
51 GVE_ADMINQ_SET_DRIVER_PARAMETER = 0xB,
[all …]
/freebsd/sys/dev/pms/RefTisa/sallsdk/spc/
H A Dsahwreg.h34 /* Message Unit Registers - BAR0(0x10), BAR0(win) */
38 #define MSGU_IBDB_SET 0x20
39 #define MSGU_HOST_INT_STATUS 0x30
40 #define MSGU_HOST_INT_MASK 0x34
41 #define MSGU_IOPIB_INT_STATUS 0x40
42 #define MSGU_IOPIB_INT_MASK 0x44
43 #define MSGU_IBDB_CLEAR 0x70
44 #define MSGU_MSGU_CONTROL 0x74
45 #define MSGU_ODR 0x9C
46 #define MSGU_ODCR 0xA0
[all …]
/freebsd/sys/dev/mii/
H A De1000phyreg.h72 #define E1000_MAX_REG_ADDRESS 0x1F
74 #define E1000_CR 0x00 /* control register */
75 #define E1000_CR_SPEED_SELECT_MSB 0x0040
76 #define E1000_CR_COLL_TEST_ENABLE 0x0080
77 #define E1000_CR_FULL_DUPLEX 0x0100
78 #define E1000_CR_RESTART_AUTO_NEG 0x0200
79 #define E1000_CR_ISOLATE 0x0400
80 #define E1000_CR_POWER_DOWN 0x0800
81 #define E1000_CR_AUTO_NEG_ENABLE 0x1000
82 #define E1000_CR_SPEED_SELECT_LSB 0x2000
[all …]
/freebsd/sys/dev/jme/
H A Dif_jmereg.h36 #define VENDORID_JMICRON 0x197B
41 #define DEVICEID_JMC250 0x0250
42 #define DEVICEREVID_JMC250_A0 0x00
43 #define DEVICEREVID_JMC250_A2 0x11
48 #define DEVICEID_JMC260 0x0260
49 #define DEVICEREVID_JMC260_A0 0x00
51 #define DEVICEID_JMC2XX_MASK 0x0FF0
54 #define JME_PCI_BAR0 0x10 /* 16KB memory window. */
56 #define JME_PCI_BAR1 0x18 /* 128bytes I/O window. */
58 #define JME_PCI_BAR2 0x1C /* 256bytes I/O window. */
[all …]
/freebsd/sys/dev/sound/pci/
H A Dvibes.c50 #define SV_PCI_ID 0xca005333
106 SND_FORMAT(AFMT_U8, 1, 0),
107 SND_FORMAT(AFMT_U8, 2, 0),
108 SND_FORMAT(AFMT_S16_LE, 1, 0),
109 SND_FORMAT(AFMT_S16_LE, 2, 0),
110 0
113 static struct pcmchan_caps sc_caps = {8000, 48000, sc_fmt, 0};
134 …device_printf(sc->dev, "sv_direct_set register 0x%02x %d != %d from line %d\n", reg, n, val, line); in _sv_direct_set()
164 device_printf(sc->dev, "sv_indirect_set register 0x%02x %d != %d line %d\n", reg, n, val, line); in _sv_indirect_set()
174 bus_space_write_4(st, sh, SV_DMA_COUNT, count & 0xffffff); in sv_dma_set_config()
[all …]
/freebsd/sys/cam/ctl/
H A Dctl_private.h94 CTL_CMD_FLAG_NONE = 0x0000,
95 CTL_CMD_FLAG_NO_SENSE = 0x0010,
96 CTL_CMD_FLAG_ALLOW_ON_RESV = 0x0020,
97 CTL_CMD_FLAG_ALLOW_ON_PR_RESV = 0x0040,
98 CTL_CMD_FLAG_ALLOW_ON_PR_WRESV = 0x0080,
99 CTL_CMD_FLAG_OK_ON_PROC = 0x0100,
100 CTL_CMD_FLAG_OK_ON_DIRECT = 0x0200,
101 CTL_CMD_FLAG_OK_ON_CDROM = 0x0400,
102 CTL_CMD_FLAG_OK_ON_BOTH = 0x0700,
103 CTL_CMD_FLAG_OK_ON_NO_LUN = 0x0800,
[all …]
/freebsd/usr.sbin/bhyve/
H A Dtpm_ppi_qemu.c27 #define TPM_PPI_ADDRESS 0xFED45000
28 #define TPM_PPI_SIZE 0x400
43 uint8_t _reserved1[0x40]; // RES1
64 if ((addr & (size - 1)) != 0) { in tpm_ppi_mem_handler()
85 return (0); in tpm_ppi_mem_handler()
143 return (0); in tpm_ppi_init()
164 assert(error == 0); in tpm_ppi_deinit()
182 dsdt_line(" If(LGreaterEqual(Arg0, 0x100))"); in tpm_ppi_write_dsdt_regions()
187 " OperationRegion(TPP1, SystemMemory, Add(0x%8x, Arg0), One)", in tpm_ppi_write_dsdt_regions()
195 dsdt_line("OperationRegion(TPP2, SystemMemory, 0x%8x, 0x%x)", in tpm_ppi_write_dsdt_regions()
[all …]

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