/freebsd/lib/msun/src/ |
H A D | e_powf.c | 21 dp_h[] = { 0.0, 5.84960938e-01,}, /* 0x3f15c000 */ 22 dp_l[] = { 0.0, 1.56322085e-06,}, /* 0x35d1cfdc */ 26 thrd = 3.33333343e-01, /* 0x3eaaaaab */ 29 two24 = 16777216.0, /* 0x4b800000 */ 33 L1 = 6.0000002384e-01, /* 0x3f19999a */ 34 L2 = 4.2857143283e-01, /* 0x3edb6db7 */ 35 L3 = 3.3333334327e-01, /* 0x3eaaaaab */ 36 L4 = 2.7272811532e-01, /* 0x3e8ba305 */ 37 L5 = 2.3066075146e-01, /* 0x3e6c3255 */ 38 L6 = 2.0697501302e-01, /* 0x3e53f14 [all...] |
H A D | e_hypotf.c | 26 ha &= 0x7fffffff; in hypotf() 28 hb &= 0x7fffffff; in hypotf() 32 if((ha-hb)>0xf000000) {return a+b;} /* x/y > 2**30 */ in hypotf() 33 k=0; in hypotf() 34 if(ha > 0x58800000) { /* a>2**50 */ in hypotf() 35 if(ha >= 0x7f800000) { /* Inf or NaN */ in hypotf() 37 w = fabsl(x+0.0L)-fabsf(y+0); in hypotf() 38 if(ha == 0x7f800000) w = a; in hypotf() 39 if(hb == 0x7f800000) w = b; in hypotf() 43 ha -= 0x22000000; hb -= 0x22000000; k += 68; in hypotf() [all …]
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H A D | e_log10f.c | 21 two25 = 3.3554432000e+07, /* 0x4c000000 */ 22 ivln10hi = 4.3432617188e-01, /* 0x3ede6000 */ 23 ivln10lo = -3.1689971365e-05, /* 0xb804ead9 */ 24 log10_2hi = 3.0102920532e-01, /* 0x3e9a2080 */ 25 log10_2lo = 7.9034151668e-07; /* 0x355427db */ 38 k=0; in log10f() 39 if (hx < 0x00800000) { /* x < 2**-126 */ in log10f() 40 if ((hx&0x7fffffff)==0) in log10f() 41 return -two25/vzero; /* log(+-0)=-inf */ in log10f() 42 if (hx<0) return (x-x)/zero; /* log(-#) = NaN */ in log10f() [all …]
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H A D | e_log2f.c | 21 two25 = 3.3554432000e+07, /* 0x4c000000 */ 22 ivln2hi = 1.4428710938e+00, /* 0x3fb8b000 */ 23 ivln2lo = -1.7605285393e-04; /* 0xb9389ad4 */ 36 k=0; in log2f() 37 if (hx < 0x00800000) { /* x < 2**-126 */ in log2f() 38 if ((hx&0x7fffffff)==0) in log2f() 39 return -two25/vzero; /* log(+-0)=-inf */ in log2f() 40 if (hx<0) return (x-x)/zero; /* log(-#) = NaN */ in log2f() 44 if (hx >= 0x7f800000) return x+x; in log2f() 45 if (hx == 0x3f800000) in log2f() [all …]
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H A D | e_acosf.c | 20 one = 1.0000000000e+00, /* 0x3F800000 */ 21 pi = 3.1415925026e+00, /* 0x40490fda */ 22 pio2_hi = 1.5707962513e+00; /* 0x3fc90fda */ 24 pio2_lo = 7.5497894159e-08; /* 0x33a22168 */ 28 * 0x1p-12f <= x <= 0.5f. The maximum error satisfies log2(e) < -30.084. 31 pS0 = 1.66666672e-01f, /* 0x3e2aaaab */ 32 pS1 = -1.19510300e-01f, /* 0xbdf4c1d1 */ 33 pS2 = 5.47002675e-03f, /* 0x3bb33de9 */ 34 qS1 = -1.16706085e+00f, /* 0xbf956240 */ 35 qS2 = 2.90115148e-01f; /* 0x3e9489f9 */ [all …]
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/freebsd/sys/contrib/alpine-hal/ |
H A D | al_hal_pbs_regs.h | 60 /* [0x0] Conf_bus, Configuration of the SB */ 62 /* [0x4] PASW high */ 64 /* [0x8] PASW low */ 66 /* [0xc] PASW high */ 68 /* [0x10] PASW low */ 70 /* [0x14] PASW high */ 72 /* [0x18] PASW low */ 74 /* [0x1c] PASW high */ 76 /* [0x20] PASW low */ 78 /* [0x24] PASW high */ [all …]
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/freebsd/sys/powerpc/include/ |
H A D | tlb.h | 36 #define MAS0_TLBSEL(x) ((x << 28) & 0x10000000) 37 #define MAS0_ESEL(x) ((x << 16) & 0x003F0000) 39 #define MAS0_TLBSEL1 0x10000000 40 #define MAS0_TLBSEL0 0x00000000 41 #define MAS0_ESEL_TLB1MASK 0x000F0000 42 #define MAS0_ESEL_TLB0MASK 0x00030000 44 #define MAS0_NV_MASK 0x00000003 45 #define MAS0_NV_SHIFT 0 47 #define MAS1_VALID 0x80000000 48 #define MAS1_IPROT 0x40000000 [all …]
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H A D | vmparam.h | 74 #define VM_MAXUSER_ADDRESS32 0xfffff000 76 #define VM_MAXUSER_ADDRESS32 0x7ffff000 80 * Would like to have MAX addresses = 0, but this doesn't (currently) work 87 * kernel map should be able to start at 0xc008000000000000 - 90 * 0x0000000000000000 - 0x000fffffffffffff user map 91 * 0xc000000000000000 - 0xc007ffffffffffff direct map 92 * 0xc008000000000000 - 0xc00fffffffffffff kernel map 95 #define VM_MIN_ADDRESS 0x0000000000000000 96 #define VM_MAXUSER_ADDRESS 0x000fffffc0000000 97 #define VM_MAX_ADDRESS 0xc00fffffffffffff [all …]
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/freebsd/sys/dev/bhnd/bcma/ |
H A D | bcma_eromreg.h | 29 #define BCMA_EROM_TABLE_START 0x000 /**< device enumeration table offset */ 30 #define BCMA_EROM_REMAPCONTROL 0xe00 31 #define BCMA_EROM_REMAPSELECT 0xe04 32 #define BCMA_EROM_MASTERSELECT 0xe10 33 #define BCMA_EROM_ITCR 0xf00 34 #define BCMA_EROM_ITIP 0xf04 64 #define BCMA_EROM_TABLE_EOF 0xF /* end of EROM table */ 66 #define BCMA_EROM_ENTRY_ISVALID_MASK 0x1 /* is entry valid? */ 67 #define BCMA_EROM_ENTRY_ISVALID_SHIFT 0 70 #define BCMA_EROM_ENTRY_TYPE_MASK 0x6 /* entry type mask */ [all …]
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/freebsd/sys/contrib/dev/ath/ath_hal/ar9300/ |
H A D | ar9330_11.ini | 76 { 0x0000a2d8 , 0x7999a83a , 0x7999a83a , 0x7999a83a , 0x7999a83a }, 77 { 0x0000a2dc , 0xffff2a52 , 0xffff2a52 , 0xffff2a52 , 0xffff2a52 }, 78 { 0x0000a2e0 , 0xffffcc84 , 0xffffcc84 , 0xffffcc84 , 0xffffcc84 }, 79 { 0x0000a2e4 , 0xfffff000 , 0xfffff000 , 0xfffff000 , 0xfffff000 }, 80 { 0x0000a2e8 , 0xfffe0000 , 0xfffe0000 , 0xfffe0000 , 0xfffe0000 }, 81 { 0x0000a410 , 0x000050d7 , 0x000050d7 , 0x000050d0 , 0x000050d0 }, 82 { 0x0000a500 , 0x00022200 , 0x00022200 , 0x00000000 , 0x00000000 }, 83 { 0x0000a504 , 0x05062002 , 0x05062002 , 0x04000002 , 0x04000002 }, 84 { 0x0000a508 , 0x0c002e00 , 0x0c002e00 , 0x08000004 , 0x08000004 }, 85 { 0x0000a50c , 0x11062202 , 0x11062202 , 0x0d000200 , 0x0d000200 }, [all …]
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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
H A D | atmel,aic.txt | 13 bits[3:0] trigger type and level flags: 20 The third cell is used to specify the irq priority from 0 (lowest) to 7 33 reg = <0xfffff000 0x200>; 41 reg = <0xffffec00 0x200>;
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H A D | atmel,aic.yaml | 37 bits[3:0] trigger type and level flags: 44 The 3rd cell specifies irq priority from 0 (lowest) to 7 (highest). 84 reg = <0xfffff000 0x200>;
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/freebsd/sys/dev/sound/pci/ |
H A D | emuxkireg.h | 50 #define EMU_PTR 0x00 51 #define EMU_PTR_CHNO_MASK 0x0000003f 52 #define EMU_PTR_ADDR_MASK 0x07ff0000 53 #define EMU_A_PTR_ADDR_MASK 0x0fff0000 55 #define EMU_DATA 0x04 57 #define EMU_IPR 0x08 58 #define EMU_IPR_RATETRCHANGE 0x01000000 59 #define EMU_IPR_FXDSP 0x00800000 60 #define EMU_IPR_FORCEINT 0x00400000 61 #define EMU_PCIERROR 0x00200000 [all …]
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/freebsd/contrib/tcpdump/ |
H A D | mpls.h | 29 #define LABEL_MASK 0xfffff000 31 #define TC_MASK 0x00000e00 33 #define STACK_MASK 0x00000100 35 #define TTL_MASK 0x000000ff 36 #define TTL_SHIFT 0
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/freebsd/lib/libkvm/ |
H A D | kvm_i386.h | 54 #define I386_PG_V 0x001 55 #define I386_PG_RW 0x002 56 #define I386_PG_PS 0x080 58 #define I386_PG_FRAME_PAE (0x000ffffffffff000ull) 59 #define I386_PG_PS_FRAME_PAE (0x000fffffffe00000ull) 60 #define I386_PG_FRAME (0xfffff000) 61 #define I386_PG_PS_FRAME (0xffc00000) 67 #if 0
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/freebsd/sys/dev/ath/ath_hal/ar5416/ |
H A D | ar5416_cal_adcgain.c | 30 #define totalAdcIOddPhase(i) caldata[0][i].u 47 for (i = 0; i < AR5416_MAX_CHAINS; i++) { in ar5416AdcGainCalCollect() 58 "%d: Chn %d oddi=0x%08x; eveni=0x%08x; oddq=0x%08x; evenq=0x%08x;\n", in ar5416AdcGainCalCollect() 74 for (i = 0; i < numChains; i++) { in ar5416AdcGainCalibration() 83 " pwr_meas_odd_i = 0x%08x\n", iOddMeasOffset); in ar5416AdcGainCalibration() 85 " pwr_meas_even_i = 0x%08x\n", iEvenMeasOffset); in ar5416AdcGainCalibration() 87 " pwr_meas_odd_q = 0x%08x\n", qOddMeasOffset); in ar5416AdcGainCalibration() 89 " pwr_meas_even_q = 0x%08x\n", qEvenMeasOffset); in ar5416AdcGainCalibration() 91 if (iOddMeasOffset != 0 && qEvenMeasOffset != 0) { in ar5416AdcGainCalibration() 93 ((iEvenMeasOffset*32)/iOddMeasOffset) & 0x3f; in ar5416AdcGainCalibration() [all …]
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/freebsd/sys/dev/agp/ |
H A D | agp_nvidia.c | 58 #define NVIDIA_VENDORID 0x10de 59 #define NVIDIA_DEVICEID_NFORCE 0x01a4 60 #define NVIDIA_DEVICEID_NFORCE2 0x01e0 135 sc->wbc_mask = 0x00010000; in agp_nvidia_attach() 138 sc->wbc_mask = 0x80000000; in agp_nvidia_attach() 149 sc->mc1_dev = pci_find_bsf(pci_get_bus(dev), 0, 1); in agp_nvidia_attach() 157 sc->mc2_dev = pci_find_bsf(pci_get_bus(dev), 0, 2); in agp_nvidia_attach() 165 sc->bdev = pci_find_bsf(pci_get_bus(dev), 30, 0); in agp_nvidia_attach() 208 sc->pg_offset = 0; in agp_nvidia_attach() 209 if (sc->num_dirs == 0) { in agp_nvidia_attach() [all …]
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H A D | agp_apple.c | 50 #define UNIN_AGP_GART_BASE 0x8c 51 #define UNIN_AGP_BASE_ADDR 0x90 52 #define UNIN_AGP_GART_CONTROL 0x94 54 #define UNIN_AGP_GART_INVAL 0x00000001 55 #define UNIN_AGP_GART_ENABLE 0x00000100 56 #define UNIN_AGP_GART_2XRESET 0x00010000 57 #define UNIN_AGP_U3_GART_PERFRD 0x00080000 78 if (agp_find_caps(dev) == 0) in agp_apple_probe() 86 case 0x0020106b: in agp_apple_probe() 87 case 0x0027106b: in agp_apple_probe() [all …]
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/freebsd/sys/contrib/device-tree/Bindings/ |
H A D | chosen.txt | 22 kaslr-seed = <0xfeedbeef 0xc0def00d>; 45 reg = <0xf00 0x10>; 94 linux,usable-memory-range = <0x9 0xf0000000 0x0 0x10000000>; 116 linux,elfcorehdr = <0x9 0xfffff000 0x0 0x800>; 134 linux,initrd-start = <0x82000000>; 135 linux,initrd-end = <0x82800000>;
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/freebsd/sys/cddl/dev/fbt/arm/ |
H A D | fbt_isa.c | 40 #define FBT_PUSHM 0xe92d0000 41 #define FBT_POPM 0xe8bd0000 42 #define FBT_JUMP 0xea000000 43 #define FBT_SUBSP 0xe24dd000 58 if (fbt->fbtp_roffset == 0) { in fbt_invop() 69 0, 0, 0); in fbt_invop() 72 cpu->cpu_dtrace_caller = 0; in fbt_invop() 76 return (0); in fbt_invop() 98 return (0); in fbt_provide_module_function() 107 if ((*instr & 0xfffff000) == FBT_SUBSP) in fbt_provide_module_function() [all …]
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/freebsd/sys/dev/qlnx/qlnxe/ |
H A D | ecore_rdma.h | 45 #define ECORE_RDMA_MAX_WQE (0x7FFF) /* 2^15 -1 */ 46 #define ECORE_RDMA_MAX_SRQ_WQE_ELEM (0x7FFF) /* 2^15 -1 */ 47 #define ECORE_RDMA_PAGE_SIZE_CAPS (0xFFFFF000) /* TODO: > 4k?! */ 49 #define ECORE_RDMA_MAX_MR_SIZE (0x10000000000ULL) /* 2^40 */ 69 #define ECORE_RDMA_MAX_CQE_32_BIT (0x7FFFFFFF - 1) 70 #define ECORE_RDMA_MAX_CQE_16_BIT (0x7FFF - 1) 83 ECORE_RDMA_TOGGLE_BIT_CLEAR = 0, 231 return 0; in ecore_rdma_is_xrc_qp()
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/freebsd/sys/dev/mlx5/mlx5_core/ |
H A D | mlx5_health.c | 49 MLX5_SENSOR_NO_ERR = 0, 59 &mlx5_fw_reset_enable, 0, 64 &sw_reset_to, 0, 124 iowrite32be((cur_cmdq_addr_l_sz & 0xFFFFF000) | in mlx5_set_nic_state() 158 mlx5_core_dbg(dev, "vector 0x%jx\n", (uintmax_t)vector); in mlx5_trigger_cmd_completions() 170 bool err = ioread32be(&h->fw_ver) == 0xffffffff; in sensor_pci_no_comm() 232 iowrite32be((cmdq_addr & 0xFFFFF000) | in reset_fw_if_needed() 244 if (health->last_reset_req != 0) { in mlx5_health_allow_reset() 253 * In principle, ticks may be 0. Setting it to off by one (-1) in mlx5_health_allow_reset() 340 /* The IFC mode field is 3 bits, so it will read 0x7 in two cases: in mlx5_handle_bad_state() [all …]
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/freebsd/share/man/man4/ |
H A D | ng_nat.4 | 69 #define NG_NAT_LOG 0x01 70 #define NG_NAT_DENY_INCOMING 0x02 71 #define NG_NAT_SAME_PORTS 0x04 72 #define NG_NAT_UNREGISTERED_ONLY 0x10 73 #define NG_NAT_RESET_ON_ADDR_CHANGE 0x20 74 #define NG_NAT_PROXY_ONLY 0x40 75 #define NG_NAT_REVERSE 0x80 76 #define NG_NAT_UNREGISTERED_CGN 0x100 77 #define NG_NAT_UDP_EIM 0x200 355 sysctl net.inet.ip.fw.one_pass=0 [all …]
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/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/ |
H A D | ELF_riscv.cpp | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 52 orc::ExecutorAddr(), G.getPointerSize(), 0); in createGOTEntry() 53 GOTBlock.addEdge(isRV64() ? R_RISCV_64 : R_RISCV_32, 0, Target, 0); in createGOTEntry() 54 return G.addAnonymousSymbol(GOTBlock, 0, G.getPointerSize(), false, false); in createGOTEntry() 59 getStubsSection(), getStubBlockContent(), orc::ExecutorAddr(), 4, 0); in createPLTStub() 61 StubContentBlock.addEdge(R_RISCV_CALL, 0, GOTEntrySymbol, 0); in createPLTStub() 62 return G.addAnonymousSymbol(StubContentBlock, 0, StubEntrySize, true, in createPLTStub() 117 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; 121 0x17, 0x0e, 0x00, 0x00, // auipc t3, literal 122 0x03, 0x3e, 0x0e, 0x00, // ld t3, literal(t3) [all …]
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/freebsd/contrib/llvm-project/lld/ELF/ |
H A D | ARMErrataFix.cpp | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40 // 32-bit B.w instruction encoded as a pair of halfwords 0xf7fe 0xbfff 105 // With op1 == 0b00, a 16-bit instruction is encoded. 107 // We test only the first halfword, looking for op != 0b00. 109 return (hw & 0xe000) == 0xe000 && (hw & 0x1800) != 0x0000; in is32bitInstruction() 115 // | 1 1 1 | 1 0 | op (7) | x (4) | 1 | op1 (3) | op2 (4) | imm8 (8) | 116 // op1 == 0x0 op != x111xxx | Conditional branch (Bcc.W) 117 // op1 == 0x1 | Branch (B.W) 122 return (instr & 0xf800d000) == 0xf0008000 && in isBcc() 123 (instr & 0x03800000) != 0x03800000; in isBcc() [all …]
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