Searched +full:0 +full:xffffec00 (Results 1 – 12 of 12) sorted by relevance
25 reg = <0xffffec00 0x200>;
51 reg = <0xffffec00 0x200>;
14 reg = <0xffffec00 0x200>;29 - bit 7-0: peripheral identifier for the hardware handshaking interface. The31 - bit 11-8: FIFO configuration. 0 for half FIFO, 1 for ALAP, 2 for ASAP.37 reg = <0xf8010000 0x100>;
38 2. The second cell is 0 for RX and 1 for TX transfers.61 reg = <0xffffec00 0x200>;
13 bits[3:0] trigger type and level flags:20 The third cell is used to specify the irq priority from 0 (lowest) to 733 reg = <0xfffff000 0x200>;41 reg = <0xffffec00 0x200>;
38 #size-cells = <0>;40 cpu@0 {43 reg = <0>;49 reg = <0x20000000 0x08000000>;55 #clock-cells = <0>;56 clock-frequency = <0>;61 #clock-cells = <0>;62 clock-frequency = <0>;68 reg = <0x00300000 0x28000>;71 ranges = <0 0x00300000 0x28000>;[all …]
43 #size-cells = <0>;45 cpu@0 {48 reg = <0>;54 reg = <0x20000000 0x04000000>;60 #clock-cells = <0>;61 clock-frequency = <0>;66 #clock-cells = <0>;67 clock-frequency = <0>;72 #clock-cells = <0>;79 reg = <0x00300000 0x10000>;[all …]
42 #size-cells = <0>;44 cpu@0 {47 reg = <0>;53 reg = <0x20000000 0x10000000>;59 #clock-cells = <0>;60 clock-frequency = <0>;65 #clock-cells = <0>;66 clock-frequency = <0>;72 reg = <0x00300000 0x8000>;75 ranges = <0 0x00300000 0x8000>;[all …]
41 #size-cells = <0>;43 cpu@0 {46 reg = <0>;52 reg = <0x20000000 0x04000000>;58 #clock-cells = <0>;59 clock-frequency = <0>;64 #clock-cells = <0>;65 clock-frequency = <0>;70 #clock-cells = <0>;77 reg = <0x002ff000 0x2000>;[all …]
40 #size-cells = <0>;42 cpu@0 {45 reg = <0>;51 reg = <0x20000000 0x08000000>;57 #clock-cells = <0>;58 clock-frequency = <0>;63 #clock-cells = <0>;64 clock-frequency = <0>;70 reg = <0x00300000 0x14000>;73 ranges = <0 0x00300000 0x14000>;[all …]
44 #size-cells = <0>;46 cpu@0 {49 reg = <0>;55 reg = <0x20000000 0x10000000>;61 #clock-cells = <0>;62 clock-frequency = <0>;67 #clock-cells = <0>;68 clock-frequency = <0>;73 #clock-cells = <0>;80 reg = <0x00300000 0x8000>;[all …]
46 #size-cells = <0>;48 cpu@0 {51 reg = <0>;57 reg = <0x70000000 0x10000000>;63 #clock-cells = <0>;64 clock-frequency = <0>;69 #clock-cells = <0>;70 clock-frequency = <0>;75 #clock-cells = <0>;82 reg = <0x00300000 0x10000>;[all …]