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/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3670.dtsi25 #size-cells = <0>;
58 cpu0: cpu@0 {
61 reg = <0x0 0x0>;
68 reg = <0x0 0x1>;
75 reg = <0x0 0x2>;
82 reg = <0x0 0x3>;
89 reg = <0x0 0x100>;
96 reg = <0x0 0x101>;
103 reg = <0x0 0x102>;
110 reg = <0x0 0x103>;
[all …]
H A Dhi3660.dtsi25 #size-cells = <0>;
58 cpu0: cpu@0 {
61 reg = <0x0 0x0>;
75 reg = <0x0 0x1>;
88 reg = <0x0 0x2>;
101 reg = <0x0 0x3>;
114 reg = <0x0 0x100>;
128 reg = <0x0 0x101>;
141 reg = <0x0 0x102>;
154 reg = <0x0 0x103>;
[all …]