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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3562.dtsi33 #clock-cells = <0>;
40 #clock-cells = <0>;
47 #size-cells = <0>;
49 cpu0: cpu@0 {
52 reg = <0x0 0x0>;
64 reg = <0x0 0x1>;
76 reg = <0x0 0x2>;
88 reg = <0x0 0x3>;
103 arm,psci-suspend-param = <0x0010000>;
147 opp-supported-hw = <0xf9 0xffff>;
[all …]
H A Drk3368.dtsi43 #address-cells = <0x2>;
44 #size-cells = <0x0>;
78 cpu_l0: cpu@0 {
81 reg = <0x0 0x0>;
89 reg = <0x0 0x1>;
97 reg = <0x0 0x2>;
105 reg = <0x0 0x3>;
113 reg = <0x0 0x100>;
121 reg = <0x0 0x101>;
129 reg = <0x0 0x102>;
[all …]