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Searched +full:0 +full:xff340000 (Results 1 – 3 of 3) sorted by relevance

/linux/Documentation/devicetree/bindings/mailbox/
H A Dxlnx,zynqmp-ipi-mailbox.yaml48 - "smc" : SMC #0, following the SMCCC
49 - "hvc" : HVC #0, following the SMCCC
80 '^mailbox@[0-9a-f]+$':
107 It contains tx(0) or rx(1) channel IPI id number.
190 #address-cells = <0x2>;
191 #size-cells = <0x2>;
195 xlnx,ipi-id = <0>;
202 reg = <0x0 0xff9905c0 0x0 0x20>,
203 <0x0 0xff9905e0 0x0 0x20>,
204 <0x0 0xff990e80 0x0 0x20>,
[all …]
/linux/sound/soc/intel/atom/sst/
H A Dsst_acpi.c38 #define SST_BYT_IRAM_PHY_START 0xff2c0000
39 #define SST_BYT_IRAM_PHY_END 0xff2d4000
40 #define SST_BYT_DRAM_PHY_START 0xff300000
41 #define SST_BYT_DRAM_PHY_END 0xff320000
42 #define SST_BYT_IMR_VIRT_START 0xc0000000 /* virtual addr in LPE */
43 #define SST_BYT_IMR_VIRT_END 0xc01fffff
44 #define SST_BYT_SHIM_PHY_ADDR 0xff340000
45 #define SST_BYT_MBOX_PHY_ADDR 0xff344000
46 #define SST_BYT_DMA0_PHY_ADDR 0xff298000
47 #define SST_BYT_DMA1_PHY_ADDR 0xff29c000
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Dpx30.dtsi39 #size-cells = <0>;
41 cpu0: cpu@0 {
44 reg = <0x0 0x0>;
56 reg = <0x0 0x1>;
68 reg = <0x0 0x2>;
80 reg = <0x0 0x3>;
95 arm,psci-suspend-param = <0x0010000>;
104 arm,psci-suspend-param = <0x1010000>;
112 cpu0_opp_table: opp-table-0 {
163 #clock-cells = <0>;
[all …]