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/freebsd/sys/contrib/device-tree/src/arc/
H A Dabilis_tb10x.dtsi18 #size-cells = <0>;
19 cpu@0 {
22 reg = <0>;
44 ranges = <0xfe000000 0xfe000000 0x02000000
45 0x000f0000 0x000f0000 0x00010000>;
50 #clock-cells = <0>;
55 #clock-cells = <0>;
61 #clock-cells = <0>;
69 reg = <0xff10601c 0x4>;
79 reg = <0xfe002000 0x20>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dqcom,pcie.txt321 reg = <0x1b500000 0x1000
322 0x1b502000 0x80
323 0x1b600000 0x100
324 0x0ff00000 0x100000>;
327 linux,pci-domain = <0>;
328 bus-range = <0x00 0xff>;
332 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000 /* I/O */
333 0x82000000 0 0 0x08000000 0 0x07e00000>; /* memory */
337 interrupt-map-mask = <0 0 0 0x7>;
338 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
[all …]
H A Dqcom,pcie.yaml588 reg = <0x1b500000 0x1000>,
589 <0x1b502000 0x80>,
590 <0x1b600000 0x100>,
591 <0x0ff00000 0x100000>;
594 linux,pci-domain = <0>;
595 bus-range = <0x00 0xff>;
599 ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000>,
600 <0x82000000 0 0 0x08000000 0 0x07e00000>;
604 interrupt-map-mask = <0 0 0 0x7>;
605 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>,
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3328.dtsi38 #size-cells = <0>;
40 cpu0: cpu@0 {
43 reg = <0x0 0x0>;
50 i-cache-size = <0x8000>;
53 d-cache-size = <0x8000>;
62 reg = <0x0 0x1>;
69 i-cache-size = <0x8000>;
72 d-cache-size = <0x8000>;
81 reg = <0x0 0x2>;
88 i-cache-size = <0x8000>;
[all …]
H A Dpx30.dtsi39 #size-cells = <0>;
41 cpu0: cpu@0 {
44 reg = <0x0 0x0>;
56 reg = <0x0 0x1>;
68 reg = <0x0 0x2>;
80 reg = <0x0 0x
[all...]
/freebsd/tools/test/iconv/ref/
H A DUTF-32BE-rev1 0x00 = 0x00000000
2 0x01 = 0x01000000
3 0x02 = 0x02000000
4 0x03 = 0x03000000
5 0x04 = 0x04000000
6 0x05 = 0x05000000
7 0x06 = 0x06000000
8 0x07 = 0x07000000
9 0x08 = 0x08000000
10 0x09 = 0x09000000
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_init_values.h35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */
36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */
37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */
38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */
40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */
41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */
42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */
43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */
44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */
45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */
[all …]