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/freebsd/sys/contrib/device-tree/Bindings/nvmem/
H A Drockchip-otp.txt19 reg = <0x0 0xff290000 0x0 0x4000>;
H A Drockchip,otp.yaml101 reg = <0x0 0xff290000 0x0 0x4000>;
111 reg = <0x07 0x10>;
115 reg = <0x17 0x1>;
119 reg = <0x1
[all...]
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Drockchip-dwmac.txt31 - pinctrl-0: pin-control mode. can be <&rgmii_pins> or <&rmii_pins>.
43 - tx_delay: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default.
44 - rx_delay: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default.
51 reg = <0xff290000 0x10000>;
65 pinctrl-0 = <&rgmii_pins /*&rmii_pins*/>;
68 snps,reset-gpio = <&gpio4 7 0>;
73 tx_delay = <0x30>;
74 rx_delay = <0x10>;
H A Drockchip-dwmac.yaml97 minimum: 0
98 maximum: 0x7F
99 default: 0x30
104 minimum: 0
105 maximum: 0x7F
106 default: 0x10
125 reg = <0xff290000 0x10000>;
142 tx_delay = <0x3
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3368.dtsi43 #address-cells = <0x2>;
44 #size-cells = <0x0>;
78 cpu_l0: cpu@0 {
81 reg = <0x0 0x0>;
89 reg = <0x0 0x1>;
97 reg = <0x0 0x2>;
105 reg = <0x
[all...]
H A Dpx30.dtsi39 #size-cells = <0>;
41 cpu0: cpu@0 {
44 reg = <0x0 0x0>;
56 reg = <0x0 0x1>;
68 reg = <0x0 0x2>;
80 reg = <0x0 0x
[all...]
/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk3288.dtsi62 #size-cells = <0>;
69 reg = <0x500>;
80 reg = <0x501>;
91 reg = <0x502>;
102 reg = <0x503>;
112 cpu_opp_table: opp-table-0 {
172 * The rk3288 cannot use the memory area above 0xfe000000
182 reg = <0x0 0xfe000000 0x
[all...]
/freebsd/tools/test/iconv/ref/
H A DUTF-32BE-rev1 0x00 = 0x00000000
2 0x01 = 0x01000000
3 0x02 = 0x02000000
4 0x03 = 0x03000000
5 0x04 = 0x04000000
6 0x05 = 0x05000000
7 0x06 = 0x06000000
8 0x07 = 0x07000000
9 0x08 = 0x08000000
10 0x09 = 0x09000000
[all …]