Searched +full:0 +full:xff290000 (Results 1 – 8 of 8) sorted by relevance
19 reg = <0x0 0xff290000 0x0 0x4000>;
101 reg = <0x0 0xff290000 0x0 0x4000>;111 reg = <0x07 0x10>;115 reg = <0x17 0x1>;119 reg = <0x1[all...]
31 - pinctrl-0: pin-control mode. can be <&rgmii_pins> or <&rmii_pins>.43 - tx_delay: Delay value for TXD timing. Range value is 0~0x7F, 0x30 as default.44 - rx_delay: Delay value for RXD timing. Range value is 0~0x7F, 0x10 as default.51 reg = <0xff290000 0x10000>;65 pinctrl-0 = <&rgmii_pins /*&rmii_pins*/>;68 snps,reset-gpio = <&gpio4 7 0>;73 tx_delay = <0x30>;74 rx_delay = <0x10>;
99 minimum: 0100 maximum: 0x7F101 default: 0x30106 minimum: 0107 maximum: 0x7F108 default: 0x10127 reg = <0xff290000 0x10000>;
43 #address-cells = <0x2>;44 #size-cells = <0x0>;78 cpu_l0: cpu@0 {81 reg = <0x0 0x0>;89 reg = <0x0 0x1>;97 reg = <0x0 0x2>;105 reg = <0x0 0x3>;113 reg = <0x0 0x100>;121 reg = <0x0 0x101>;129 reg = <0x0 0x102>;[all …]
39 #size-cells = <0>;41 cpu0: cpu@0 {44 reg = <0x0 0x0>;56 reg = <0x0 0x1>;68 reg = <0x0 0x2>;80 reg = <0x0 0x[all...]
62 #size-cells = <0>;69 reg = <0x500>;80 reg = <0x501>;91 reg = <0x502>;102 reg = <0x503>;112 cpu_opp_table: opp-table-0 {172 * The rk3288 cannot use the memory area above 0xfe000000182 reg = <0x0 0xfe000000 0x0 0x1000000>;190 #clock-cells = <0>;206 reg = <0x0 0xff810000 0x0 0x20>;[all …]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]