Searched +full:0 +full:xff040000 (Results 1 – 8 of 8) sorted by relevance
29 reg = <0x0 0xff040000 0x0 0x1000>;30 clocks = <&clk_pdm>, <&clk_gates28 0>;36 pinctrl-0 = <&pdmm0_clk
74 enum: [ 0, 1, 2, 3 ]77 const: 0104 reg = <0x0 0xff040000 0x0 0x1000>;110 #sound-dai-cells = <0>;112 pinctrl-0 = <&pdmm0_clk
30 bootscr-address = /bits/ 64 <0x20000000>;36 #size-cells = <0>;38 cpu0: cpu@0 {43 reg = <0x0>;52 reg = <0x1>;62 reg = <0x2>;72 reg = <0x3>;87 CPU_SLEEP_0: cpu-sleep-0 {89 arm,psci-suspend-param = <0x40000000>;130 reg = <0x0 0x3ed00000 0x0 0x40000>;[all …]
44 #size-cells = <0>;46 cpu0: cpu@0 {49 reg = <0x0 0x0>;62 reg = <0x0 0x1>;72 reg = <0x0 0x2>;82 reg = <0x0 0x3>;95 arm,psci-suspend-param = <0x0010000>;109 cpu0_opp_table: opp-table-0 {149 #clock-cells = <0>;167 #clock-cells = <0>;[all …]
38 #size-cells = <0>;40 cpu0: cpu@0 {43 reg = <0x0 0x0>;50 i-cache-size = <0x8000>;53 d-cache-size = <0x8000>;62 reg = <0x0 0x1>;69 i-cache-size = <0x8000>;72 d-cache-size = <0x8000>;81 reg = <0x0 0x2>;88 i-cache-size = <0x8000>;[all …]
39 #size-cells = <0>;41 cpu0: cpu@0 {44 reg = <0x0 0x0>;56 reg = <0x0 0x1>;68 reg = <0x0 0x2>;80 reg = <0x0 0x[all...]
33 #define FW_ENCODE_32BIT_PATTERN 0x1e1e1e1e39 #define LICENSE_MAX_ISCSI_TRGT_CONN_MASK 0xFFFF40 #define LICENSE_MAX_ISCSI_TRGT_CONN_SHIFT 041 #define LICENSE_MAX_ISCSI_INIT_CONN_MASK 0xFFFF000047 #define LICENSE_MAX_FCOE_TRGT_CONN_MASK 0xFFFF48 #define LICENSE_MAX_FCOE_TRGT_CONN_SHIFT 049 #define LICENSE_MAX_FCOE_INIT_CONN_MASK 0xFFFF000061 #define PIN_CFG_NA 0x0000000062 #define PIN_CFG_GPIO0_P0 0x0000000163 #define PIN_CFG_GPIO1_P0 0x00000002[all …]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]