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19 #size-cells = <0>;21 cpu0: cpu@0 {24 reg = <0x0 0x0>;27 d-cache-size = <0x8000>;30 i-cache-size = <0x8000>;38 reg = <0x0 0x1>;41 d-cache-size = <0x8000>;44 i-cache-size = <0x8000>;53 cache-size = <0x7d000>; /* L2. 512 KB */76 #clock-cells = <0>;[all …]