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/linux/drivers/platform/x86/
H A Dmsi-ec.h18 #define MSI_EC_ADDR_UNKNOWN 0xff01 // unknown address
19 #define MSI_EC_ADDR_UNSUPP 0xff01 // unsupported parameter
22 #define MSI_EC_FW_VERSION_ADDRESS 0xa0
23 #define MSI_EC_FW_DATE_ADDRESS 0xac
24 #define MSI_EC_FW_TIME_ADDRESS 0xb4
53 #define MSI_EC_MODE_NULL { NULL, 0 }
95 #define MSI_EC_KBD_BL_STATE_MASK 0x3
/linux/drivers/tty/vt/
H A Ducs.c32 return 0; in interval16_cmp()
44 return 0; in interval32_cmp()
49 if (cp < ranges[0].first || cp > ranges[size - 1].last) in cp_in_range16()
58 if (cp < ranges[0].first || cp > ranges[size - 1].last) in cp_in_range32()
65 #define UCS_IS_BMP(cp) ((cp) <= 0xffff)
134 return 0; in recomposition_cmp()
142 * Return: Recomposed Unicode code point, or 0 if no recomposition is possible
149 return 0; in ucs_recompose()
158 return result ? result->recomposed : 0; in ucs_recompose()
172 u8 offset; /* Offset within page (0-255) */
[all …]
H A Dgen_ucs_fallback_table.py34 RANGE_MARKER = 0x00
40 # Process BMP characters (0x0000 - 0xFFFF) to keep table size manageable
41 for cp in range(0x0080, 0x10000): # Skip ASCII range (0x00-0x7F)
72 overrides[0x00C6] = ord('E') # Æ LATIN CAPITAL LETTER AE -> E (unidecode: "AE")
73 overrides[0x00E6] = ord('e') # æ LATIN SMALL LETTER AE -> e (unidecode: "ae")
74 overrides[0x0152] = ord('E') # ΠLATIN CAPITAL LIGATURE OE -> E (unidecode: "OE")
75 overrides[0x0153] = ord('e') # œ LATIN SMALL LETTER LIGATURE OE -> e (unidecode: "oe")
76 overrides[0x00DF] = ord('s') # ß LATIN SMALL LETTER SHARP S -> s (unidecode: "ss")
79 overrides[0x2264] = ord('<') # ≤ LESS-THAN OR EQUAL TO -> < (unidecode: "<=")
80 overrides[0x2265] = ord('>') # ≥ GREATER-THAN OR EQUAL TO -> > (unidecode: ">=")
[all …]
/linux/arch/mips/kernel/
H A Dr4k_switch.S37 LONG_S t9, 0(t8)
50 li a3, 0xff01
53 nor a3, $0, a3
H A Dr2300_switch.S41 LONG_S t9, 0(t8)
55 li a3, 0xff01
58 nor a3, $0, a3
H A Docteon_switch.S31 #if CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0
38 andi t0, 0x3f
46 LONG_L t8, 0(t1) /* Load from CVMSEG */
50 LONG_S t8, 0(t2) /* Store CVMSEG to thread storage */
58 xori t0, t0, 0x40 /* Bit 6 is CVMSEG user enable */
66 LONG_S t9, 0(t8)
80 li a3, 0xff01
83 nor a3, $0, a3
102 dmfc2 t0, 0x0201
103 dmfc2 t1, 0x0202
[all …]
/linux/tools/include/linux/
H A Darm-smccc.h18 #define ARM_SMCCC_STD_CALL _AC(0,U)
22 #define ARM_SMCCC_SMC_32 0
26 #define ARM_SMCCC_OWNER_MASK 0x3F
29 #define ARM_SMCCC_FUNC_MASK 0xFFFF
45 #define ARM_SMCCC_OWNER_ARCH 0
57 #define ARM_SMCCC_FUNC_QUERY_CALL_UID 0xff01
59 #define ARM_SMCCC_QUIRK_NONE 0
62 #define ARM_SMCCC_VERSION_1_0 0x10000
63 #define ARM_SMCCC_VERSION_1_1 0x10001
64 #define ARM_SMCCC_VERSION_1_2 0x10002
[all …]
/linux/drivers/hid/
H A Dhid-microsoft.c22 #define MS_HIDINPUT BIT(0)
41 #define ENABLE_WEAK BIT(0)
69 if ((quirks & MS_RDESC) && *rsize == 571 && rdesc[557] == 0x19 && in ms_report_fixup()
70 rdesc[559] == 0x29) { in ms_report_fixup()
72 rdesc[557] = 0x35; in ms_report_fixup()
73 rdesc[559] = 0x45; in ms_report_fixup()
91 case 0x29d: in ms_ergonomy_kb_quirk()
94 case 0x29e: in ms_ergonomy_kb_quirk()
98 return 0; in ms_ergonomy_kb_quirk()
102 return 0; in ms_ergonomy_kb_quirk()
[all …]
H A Dhid-chicony.c24 #define CH_WIRELESS_CTL_REPORT_ID 0x11
32 return 0; in ch_report_wireless()
34 input = report->field[0]->hidinput->input; in ch_report_wireless()
37 return 0; in ch_report_wireless()
42 input_report_key(input, KEY_RFKILL, 0); in ch_report_wireless()
54 return 0; in ch_raw_event()
64 return 0; in ch_input_mapping()
68 case 0xff01: ch_map_key_clear(BTN_1); break; in ch_input_mapping()
69 case 0xff02: ch_map_key_clear(BTN_2); break; in ch_input_mapping()
70 case 0xff03: ch_map_key_clear(BTN_3); break; in ch_input_mapping()
[all …]
/linux/include/linux/usb/
H A Dtypec_dp.h8 #define USB_TYPEC_DP_SID 0xff01
13 #define USB_TYPEC_NVIDIA_VLINK_SID 0x955 /* NVIDIA VirtualLink */
29 TYPEC_DP_STATE_A = TYPEC_STATE_MODAL, /* Not supported after v1.0b */
30 TYPEC_DP_STATE_B, /* Not supported after v1.0b */
34 TYPEC_DP_STATE_F, /* Not supported after v1.0b */
54 DP_PIN_ASSIGN_A, /* Not supported after v1.0b */
55 DP_PIN_ASSIGN_B, /* Not supported after v1.0b */
59 DP_PIN_ASSIGN_F, /* Not supported after v1.0b */
64 #define DP_CMD_STATUS_UPDATE VDO_CMD_VENDOR(0)
87 #define DP_CAP_CABLE_TYPE_PASSIVE 0
[all …]
/linux/lib/crc/
H A Dcrc16.c11 /** CRC table for the CRC-16. The poly is 0x8005 (x^16 + x^15 + x^2 + 1) */
13 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241,
14 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440,
15 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40,
16 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841,
17 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40,
18 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41,
19 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641,
20 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040,
21 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240,
[all …]
/linux/arch/arm/mach-highbank/
H A Dhighbank.c36 asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base)); in highbank_scu_map_io()
45 highbank_smc1(0x102, val); in highbank_l2c310_write_sec()
47 WARN_ONCE(1, "Highbank L2C310: ignoring write to reg 0x%x\n", in highbank_l2c310_write_sec()
79 reg = 0xc; in highbank_platform_notifier()
81 reg = 0x18; in highbank_platform_notifier()
83 reg = 0x20; in highbank_platform_notifier()
86 IORESOURCE_MEM, 0); in highbank_platform_notifier()
88 if (res->start == 0xfff50000) in highbank_platform_notifier()
89 reg = 0; in highbank_platform_notifier()
[all...]
/linux/drivers/gpu/drm/radeon/
H A Dsi_dpm.h30 SISLANDS_CACCONFIG_MMR = 0,
115 #define SISLANDS_MCREGISTERTABLE_INITIAL_SLOT 0
125 #define SISLANDS_LEAKAGE_INDEX0 0xff01
201 #define SISLANDS_INITIAL_STATE_ARB_INDEX 0
217 #define SISLANDS_DPM2_SQ_RAMP_MAX_POWER 0x3FFF
218 #define SISLANDS_DPM2_SQ_RAMP_MIN_POWER 0x12
219 #define SISLANDS_DPM2_SQ_RAMP_MAX_POWER_DELTA 0x15
220 #define SISLANDS_DPM2_SQ_RAMP_STI_SIZE 0x1E
221 #define SISLANDS_DPM2_SQ_RAMP_LTI_RATIO 0xF
225 #define SISLANDS_VRC_DFLT 0xC000B3
[all …]
/linux/drivers/input/joystick/iforce/
H A Diforce.h31 #define FF_MOD1_IS_USED 0
46 #define FF_CMD_EFFECT 0x010e
47 #define FF_CMD_ENVELOPE 0x0208
48 #define FF_CMD_MAGNITUDE 0x0303
49 #define FF_CMD_PERIOD 0x0407
50 #define FF_CMD_CONDITION 0x050a
52 #define FF_CMD_AUTOCENTER 0x4002
53 #define FF_CMD_PLAY 0x4103
54 #define FF_CMD_ENABLE 0x4201
55 #define FF_CMD_GAIN 0x4301
[all …]
/linux/sound/soc/codecs/
H A Drt711.h32 #define RT711_AUDIO_FUNCTION_GROUP 0x01
33 #define RT711_DAC_OUT2 0x03
34 #define RT711_ADC_IN1 0x09
35 #define RT711_ADC_IN2 0x08
36 #define RT711_DMIC1 0x12
37 #define RT711_DMIC2 0x13
38 #define RT711_MIC2 0x19
39 #define RT711_LINE1 0x1a
40 #define RT711_LINE2 0x1b
41 #define RT711_BEEP 0x1d
[all …]
/linux/include/linux/mtd/
H A Donenand_regs.h20 #define ONENAND_BOOTRAM ONENAND_MEMORY_MAP(0x0000)
21 #define ONENAND_DATARAM ONENAND_MEMORY_MAP(0x0200)
22 #define ONENAND_SPARERAM ONENAND_MEMORY_MAP(0x8010)
27 #define ONENAND_REG_MANUFACTURER_ID ONENAND_MEMORY_MAP(0xF000)
28 #define ONENAND_REG_DEVICE_ID ONENAND_MEMORY_MAP(0xF001)
29 #define ONENAND_REG_VERSION_ID ONENAND_MEMORY_MAP(0xF002)
30 #define ONENAND_REG_DATA_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF003)
31 #define ONENAND_REG_BOOT_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF004)
32 #define ONENAND_REG_NUM_BUFFERS ONENAND_MEMORY_MAP(0xF005)
33 #define ONENAND_REG_TECHNOLOGY ONENAND_MEMORY_MAP(0xF006)
[all …]
/linux/Documentation/devicetree/bindings/connector/
H A Dusb-connector.yaml177 enum: [ 0xff01 ]
197 port@0:
211 - port@0
215 is applied during PD3.0 Fast Role Swap. "Table 6-14 Fixed Supply PDO - Sink"
247 "^caps-[0-9]+$":
294 default: 0
322 Bit 0 when set indicates it has been tested on LPS compliant source
334 minimum: 0
434 svid = /bits/ 16 <0xff01>;
435 vdo = <0x00001c46>;
[all …]
/linux/tools/testing/selftests/hid/tests/
H A Dtest_apple_keyboard.py28 0x05, 0x01, # Usage Page (Generic Desktop)
29 0x09, 0x06, # Usage (Keyboard)
30 0xa1, 0x01, # Collection (Application)
31 0x85, 0x01, # .Report ID (1)
32 0x05, 0x07, # .Usage Page (Keyboard)
33 0x19, 0xe0, # .Usage Minimum (224)
34 0x29, 0xe7, # .Usage Maximum (231)
35 0x15, 0x00, # .Logical Minimum (0)
36 0x25, 0x01, # .Logical Maximum (1)
37 0x75, 0x01, # .Report Size (1)
[all …]
/linux/drivers/scsi/qla4xxx/
H A Dql4_nx.h13 #define PHAN_INITIALIZE_FAILED 0xffff
14 #define PHAN_INITIALIZE_COMPLETE 0xff01
17 #define PHAN_INITIALIZE_ACK 0xf00f
18 #define PHAN_PEG_RCV_INITIALIZED 0xff01
21 #define QLA82XX_CRB_BASE (QLA82XX_CAM_RAM(0x200))
23 #define CRB_CMDPEG_STATE QLA82XX_REG(0x50)
24 #define CRB_RCVPEG_STATE QLA82XX_REG(0x13c)
25 #define CRB_DMA_SHIFT QLA82XX_REG(0xcc)
26 #define CRB_TEMP_STATE QLA82XX_REG(0x1b4)
31 #define qla82xx_get_temp_state(x) ((x) & 0xffff)
[all …]
/linux/drivers/platform/x86/intel/
H A Dchtwc_int33fe.c52 return 0; in cht_int33fe_check_for_max17047()
56 return 0; in cht_int33fe_check_for_max17047()
139 PROPERTY_ENTRY_U16("svid", 0xff01),
140 PROPERTY_ENTRY_U32("vdo", 0x0c0086),
186 return 0; in cht_int33fe_setup_dp()
205 fusb302_mux_refs[0] = SOFTWARE_NODE_REFERENCE(NULL); in cht_int33fe_put_swnode()
236 fusb302_mux_refs[0] = SOFTWARE_NODE_REFERENCE(mux_ref_node); in cht_int33fe_add_nodes()
252 return 0; in cht_int33fe_add_nodes()
280 return 0; in cht_int33fe_register_max17047()
283 memset(&board_info, 0, sizeof(board_info)); in cht_int33fe_register_max17047()
[all …]
/linux/arch/mips/include/asm/
H A Delf.h21 #define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
22 #define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
23 #define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
24 #define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
25 #define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
26 #define EF_MIPS_ARCH_32 0x50000000 /* MIPS32 code. */
27 #define EF_MIPS_ARCH_64 0x60000000 /* MIPS64 code. */
28 #define EF_MIPS_ARCH_32R2 0x70000000 /* MIPS32 R2 code. */
29 #define EF_MIPS_ARCH_64R2 0x80000000 /* MIPS64 R2 code. */
32 #define EF_MIPS_ABI_O32 0x00001000 /* O32 ABI. */
[all …]
/linux/drivers/video/fbdev/matrox/
H A Dmatroxfb_base.h92 #define PCI_SS_VENDOR_ID_SIEMENS_NIXDORF 0x110A
99 #define PCI_SS_ID_MATROX_GENERIC 0xFF00
100 #define PCI_SS_ID_MATROX_PRODUCTIVA_G100_AGP 0xFF01
101 #define PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP 0xFF02
102 #define PCI_SS_ID_MATROX_MILLENIUM_G200_AGP 0xFF03
103 #define PCI_SS_ID_MATROX_MARVEL_G200_AGP 0xFF04
104 #define PCI_SS_ID_MATROX_MGA_G100_PCI 0xFF05
105 #define PCI_SS_ID_MATROX_MGA_G100_AGP 0x1001
106 #define PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP 0x2179
107 #define PCI_SS_ID_SIEMENS_MGA_G100_AGP 0x001E /* 30 */
[all …]
/linux/drivers/net/ethernet/qlogic/qlcnic/
H A Dqlcnic_83xx_hw.h15 #define QLCNIC_83XX_BAR0_LENGTH 0x4000
18 #define QLC_83XX_CRB_WIN_BASE 0x3800
20 #define QLC_83XX_SEM_LOCK_BASE 0x3840
21 #define QLC_83XX_SEM_UNLOCK_BASE 0x3844
24 #define QLC_83XX_LINK_STATE(f) (0x3698+((f) > 7 ? 4 : 0))
25 #define QLC_83XX_LINK_SPEED(f) (0x36E0+(((f) >> 2) * 4))
28 #define QLC_83XX_INTX_PTR 0x38C0
29 #define QLC_83XX_INTX_TRGR 0x38C4
30 #define QLC_83XX_INTX_MASK 0x38C8
38 #define QLC_83XX_DRV_LOCK_RECOVERY_STATUS_MASK 0x3
[all …]
/linux/arch/parisc/include/asm/
H A Delf.h17 #define EF_PARISC_TRAPNIL 0x00010000 /* Trap nil pointer dereference. */
18 #define EF_PARISC_EXT 0x00020000 /* Program uses arch. extensions. */
19 #define EF_PARISC_LSB 0x00040000 /* Program expects little endian. */
20 #define EF_PARISC_WIDE 0x00080000 /* Program expects wide mode. */
21 #define EF_PARISC_NO_KABP 0x00100000 /* No kernel assisted branch
23 #define EF_PARISC_LAZYSWAP 0x00400000 /* Allow lazy swapping. */
24 #define EF_PARISC_ARCH 0x0000ffff /* Architecture version. */
28 #define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
29 #define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
30 #define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
[all …]
/linux/drivers/net/ethernet/qlogic/netxen/
H A Dnetxen_nic.h37 #define _NETXEN_NIC_LINUX_MINOR 0
42 #define _major(v) (((v) >> 24) & 0xff)
43 #define _minor(v) (((v) >> 16) & 0xff)
44 #define _build(v) ((v) & 0xffff)
47 * 7:0 - major
52 NETXEN_VERSION_CODE(((v) & 0xff), (((v) >> 8) & 0xff), ((v) >> 16))
72 #define NETXEN_RCV_PRODUCER_OFFSET 0
75 #define FLASH_SUCCESS 0
78 ((off > NETXEN_CRB_PCIX_HOST2) && (off < NETXEN_CRB_MAX)) ? 1 : 0
96 #define NX_P2_C0 0x24
[all …]

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