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/freebsd/sys/riscv/riscv/
H A Dsdt_machdep.c22 (patchpoint & (INSN_C_SIZE - 1)) != 0 || in sdt_tracepoint_valid()
23 (target & (INSN_C_SIZE - 1)) != 0) in sdt_tracepoint_valid()
46 imm = (imm & 0x100000) | in sdt_tracepoint_patch()
47 ((imm & 0x7fe) << 8) | in sdt_tracepoint_patch()
48 ((imm & 0x800) >> 2) | in sdt_tracepoint_patch()
49 ((imm & 0xff000) >> 12); in sdt_tracepoint_patch()
64 instr = 0x13; /* uncompressed nop */ in sdt_tracepoint_restore()
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dqcom,msm8916-venus.yaml77 reg = <0x01d00000 0xff000>;
H A Dqcom,sc7180-venus.yaml103 reg = <0x0aa00000 0xff000>;
115 iommus = <&apps_smmu 0x0c00 0x60>;
H A Dqcom,sdm845-venus-v2.yaml103 reg = <0x0aa00000 0xff000>;
119 iommus = <&apps_smmu 0x10a0 0x8>,
120 <&apps_smmu 0x10b0 0x0>;
H A Dqcom,sdm845-venus.yaml105 reg = <0x0aa00000 0xff000>;
112 iommus = <&apps_smmu 0x10a0 0x8>,
113 <&apps_smmu 0x10b0 0x0>;
H A Dqcom,sm8250-venus.yaml113 reg = <0x0aa00000 0xff000>;
129 iommus = <&apps_smmu 0x2100 0x0400>;
H A Dqcom,sdm660-venus.yaml113 reg = <0x0cc00000 0xff000>;
119 interconnects = <&gnoc 0 &mnoc 13>,
123 iommus = <&mmss_smmu 0x400>,
124 <&mmss_smmu 0x401>,
125 <&mmss_smmu 0x40a>,
126 <&mmss_smmu 0x407>,
127 <&mmss_smmu 0x40e>,
128 <&mmss_smmu 0x40f>,
129 <&mmss_smmu 0x408>,
130 <&mmss_smmu 0x409>,
[all …]
H A Dqcom,msm8996-venus.yaml114 reg = <0x00c00000 0xff000>;
122 iommus = <&venus_smmu 0x00>,
123 <&venus_smmu 0x01>,
124 <&venus_smmu 0x0a>,
125 <&venus_smmu 0x07>,
126 <&venus_smmu 0x0e>,
127 <&venus_smmu 0x0f>,
128 <&venus_smmu 0x08>,
129 <&venus_smmu 0x09>,
130 <&venus_smmu 0x0b>,
[all …]
/freebsd/contrib/ntp/include/
H A Dhopf6039.h13 #define HOPF_CNTR_MEM_LEN 0x7f
14 #define HOPF_DATA_MEM_LEN 0x3ff /* this is our memory size */
23 #define HIWORD(l) ((WORD)(((DWORD)(l) >> 16) & 0xFFFF))
25 #define HIBYTE(w) ((BYTE)(((WORD)(w) >> 8) & 0xFF))
29 #define HOPF_CLOCK_CMD_MASK 0xff000
31 #define HOPF_CLOCK_GET_LOCAL 0x10000
32 #define HOPF_CLOCK_GET_UTC 0x20000
33 #define HOPF_CLOCK_GET_ANTENNA 0x30000
34 #define HOPF_CLOCK_GET_DIFFERENCE 0x40000
35 #define HOPF_CLOCK_GET_VERSION 0x50000
[all …]
/freebsd/sys/i386/i386/
H A Dgeode.c43 { 0xf0000, 0xf1000 },
45 { "Soekris", 0, 8 }, /* Soekris Engineering. */
46 { "net4", 0, 8 }, /* net45xx */
47 { "comBIOS", 0, 54 }, /* comBIOS ver. 1.26a 20040819 ... */
48 { NULL, 0, 0 },
53 { 0xf0000, 0xf1000 },
55 { "Soekris", 0, 8 }, /* Soekris Engineering. */
56 { "net5", 0, 8 }, /* net5xxx */
57 { "comBIOS", 0, 54 }, /* comBIOS ver. 1.26a 20040819 ... */
58 { NULL, 0, 0 },
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm630.dtsi35 #clock-cells = <0>;
42 #clock-cells = <0>;
50 #size-cells = <0>;
55 reg = <0x0 0x100>;
75 reg = <0x0 0x101>;
90 reg = <0x0 0x102>;
105 reg = <0x0 0x103>;
117 CPU4: cpu@0 {
120 reg = <0x0 0x0>;
140 reg = <0x0 0x1>;
[all …]
H A Dmsm8916.dtsi27 reg = <0 0x80000000 0 0>;
36 reg = <0x0 0x86000000 0x0 0x300000>;
42 reg = <0x0 0x86300000 0x0 0x100000>;
50 reg = <0x0 0x86400000 0x0 0x100000>;
55 reg = <0x0 0x86500000 0x0 0x180000>;
60 reg = <0x0 0x86680000 0x0 0x80000>;
66 reg = <0x0 0x86700000 0x0 0xe0000>;
73 reg = <0x0 0x867e0000 0x0 0x20000>;
85 * alignment = <0x0 0x400000>;
86 * alloc-ranges = <0x0 0x86800000 0x0 0x8000000>;
[all …]
H A Dmsm8998.dtsi16 qcom,msm-id = <292 0x0>;
26 reg = <0x0 0x80000000 0x0 0x0>;
35 reg = <0x0 0x85800000 0x0 0x600000>;
40 reg = <0x0 0x85e00000 0x0 0x100000>;
45 reg = <0x0 0x86000000 0x0 0x200000>;
50 reg = <0x0 0x86200000 0x0 0x2d00000>;
56 reg = <0x0 0x88f00000 0x0 0x200000>;
64 reg = <0x0 0x8ab00000 0x0 0x700000>;
69 reg = <0x0 0x8b200000 0x0 0x1a00000>;
74 reg = <0x0 0x8cc00000 0x0 0x7000000>;
[all …]
H A Dmsm8996.dtsi29 #clock-cells = <0>;
36 #clock-cells = <0>;
44 #size-cells = <0>;
46 CPU0: cpu@0 {
49 reg = <0x0 0x0>;
53 clocks = <&kryocc 0>;
68 reg = <0x0 0x1>;
72 clocks = <&kryocc 0>;
82 reg = <0x0 0x100>;
101 reg = <0x0 0x101>;
[all …]
H A Dsc7180.dtsi66 #clock-cells = <0>;
72 #clock-cells = <0>;
78 #size-cells = <0>;
80 CPU0: cpu@0 {
83 reg = <0x0 0x0>;
84 clocks = <&cpufreq_hw 0>;
95 qcom,freq-domain = <&cpufreq_hw 0>;
112 reg = <0x0 0x100>;
113 clocks = <&cpufreq_hw 0>;
124 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
H A Dsdm845.dtsi78 #clock-cells = <0>;
85 #clock-cells = <0>;
92 #size-cells = <0>;
94 CPU0: cpu@0 {
97 reg = <0x0 0x0>;
98 clocks = <&cpufreq_hw 0>;
102 qcom,freq-domain = <&cpufreq_hw 0>;
126 reg = <0x0 0x100>;
127 clocks = <&cpufreq_hw 0>;
131 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/RISCV/
H A DEmulateInstructionRISCV.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
49 constexpr uint32_t BEQ = 0b000;
50 constexpr uint32_t BNE = 0b001;
51 constexpr uint32_t BLT = 0b100;
52 constexpr uint32_t BGE = 0b101;
53 constexpr uint32_t BLTU = 0b110;
54 constexpr uint32_t BGEU = 0b111;
71 return (uint64_t(int64_t(int32_t(inst & 0x80000000)) >> 11)) // imm[20] in DecodeJImm()
72 | (inst & 0xff000) // imm[19:12] in DecodeJImm()
73 | ((inst >> 9) & 0x800) // imm[11] in DecodeJImm()
[all …]
/freebsd/sys/dev/bxe/
H A Dbxe_dump.h33 #define DRV_DUMP_XSTORM_WAITP_ADDRESS 0x2b8a80
34 #define DRV_DUMP_TSTORM_WAITP_ADDRESS 0x1b8a80
35 #define DRV_DUMP_USTORM_WAITP_ADDRESS 0x338a80
36 #define DRV_DUMP_CSTORM_WAITP_ADDRESS 0x238a80
56 #define BNX2X_DUMP_VERSION 0x61111111
76 static const uint32_t page_vals_e2[] = {0, 128};
79 {0x58000, 4608, DUMP_CHIP_E2, 0x30}
85 static const uint32_t page_vals_e3[] = {0, 128};
88 {0x58000, 4608, DUMP_CHIP_E3A0 | DUMP_CHIP_E3B0, 0x30}
92 { 0x2000, 1, 0x1f, 0xfff},
[all …]
/freebsd/sys/dev/bnxt/bnxt_en/
H A Dhsi_struct_def.h71 * * 0x0-0xFFF8 - The function ID
72 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
73 * * 0xFFFD - Reserved for user-space HWRM interface
74 * * 0xFFFF - HWRM
104 #define CMD_DISCR_TLV_ENCAP UINT32_C(0x8000)
109 #define TLV_TYPE_HWRM_REQUEST UINT32_C(0x1)
111 #define TLV_TYPE_HWRM_RESPONSE UINT32_C(0x2)
113 #define TLV_TYPE_ROCE_SP_COMMAND UINT32_C(0x3)
115 #define TLV_TYPE_QUERY_ROCE_CC_GEN1 UINT32_C(0x4)
117 #define TLV_TYPE_MODIFY_ROCE_CC_GEN1 UINT32_C(0x5)
[all …]