Searched +full:0 +full:xfed80000 (Results 1 – 4 of 4) sorted by relevance
15 #define SP5100_WDT_MEM_MAP_SIZE 0x0816 #define SP5100_WDT_CONTROL(base) ((base) + 0x00) /* Watchdog Control */17 #define SP5100_WDT_COUNT(base) ((base) + 0x04) /* Watchdog Count */19 #define SP5100_WDT_START_STOP_BIT BIT(0)25 #define SP5100_PM_IOPORTS_SIZE 0x0233 #define SP5100_IO_PM_INDEX_REG 0xCD634 #define SP5100_IO_PM_DATA_REG 0xCD737 #define SP5100_SB_RESOURCE_MMIO_BASE 0x9C39 #define SP5100_PM_WATCHDOG_CONTROL 0x6940 #define SP5100_PM_WATCHDOG_BASE 0x6C[all …]
49 port@0:72 - port@092 reg = <0xfed80000 0x10000>;102 #size-cells = <0>;104 port@0 {105 reg = <0>;
20 #define AMD_FCH_MMIO_BASE 0xFED8000021 #define AMD_FCH_GPIO_BANK0_BASE 0x150022 #define AMD_FCH_GPIO_SIZE 0x030058 return 0; in amd_fch_gpio_direction_input()81 return 0; in amd_fch_gpio_direction_output()136 return 0; in amd_fch_gpio_request()
56 #size-cells = <0>;91 cpu_l0: cpu@0 {94 reg = <0x0>;115 reg = <0x100>;134 reg = <0x200>;153 reg = <0x300>;172 reg = <0x400>;193 reg = <0x500>;212 reg = <0x600>;233 reg = <0x700>;[all …]