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Searched +full:0 +full:xfdd00000 (Results 1 – 9 of 9) sorted by relevance

/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8992.dtsi29 reg = <0xfdd00000 0x2000>, <0xfec00000 0x100000>;
31 gmu-sram@0 {
32 reg = <0x0 0x80000>;
H A Dmsm8994.dtsi29 #clock-cells = <0>;
36 #clock-cells = <0>;
44 #size-cells = <0>;
46 CPU0: cpu@0 {
49 reg = <0x0 0x0>;
62 reg = <0x0 0x1>;
70 reg = <0x0 0x2>;
78 reg = <0x0 0x3>;
86 reg = <0x0 0x100>;
99 reg = <0x0 0x101>;
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Drockchip,rk3568-cru.yaml63 reg = <0xfdd00000 0x1000>;
70 reg = <0xfdd20000 0x1000>;
/linux/Documentation/devicetree/bindings/sram/
H A Dqcom,ocmem.yaml86 "-sram@[0-9a-f]+$":
106 reg = <0xfdd00000 0x2000>,
107 <0xfec00000 0x180000>;
118 ranges = <0 0xfec00000 0x100000>;
120 gmu-sram@0 {
121 reg = <0x0 0x100000>;
/linux/arch/arm/mach-dove/
H A Ddove.h14 * e0000000 @runtime 128M PCIe-0 Memory space
18 * f2000000 fee00000 1M PCIe-0 I/O space
22 #define DOVE_CESA_PHYS_BASE 0xc8000000
23 #define DOVE_CESA_VIRT_BASE IOMEM(0xfdb00000)
26 #define DOVE_PCIE0_MEM_PHYS_BASE 0xe0000000
29 #define DOVE_PCIE1_MEM_PHYS_BASE 0xe8000000
32 #define DOVE_BOOTROM_PHYS_BASE 0xf8000000
35 #define DOVE_SCRATCHPAD_PHYS_BASE 0xf0000000
36 #define DOVE_SCRATCHPAD_VIRT_BASE IOMEM(0xfdd00000)
39 #define DOVE_SB_REGS_PHYS_BASE 0xf1000000
[all …]
/linux/Documentation/devicetree/bindings/display/msm/
H A Dgpu.yaml32 - pattern: '^qcom,adreno-[0-9a-f]{8}$'
38 - pattern: '^qcom,adreno-[3-7][0-9][0-9]\.[0-9]+$'
44 - pattern: '^amd,imageon-200\.[0-1]$'
149 pattern: '^qcom,adreno-[3-5][0-9][0-9]\.[0-9]+$'
225 pattern: '^qcom,adreno-[67][0-9][0-9]\.[0-9]+$'
252 reg = <0xfdb00000 0x10000>;
266 iommus = <&gpu_iommu 0>;
273 reg = <0xfdd00000 0x2000>,
274 <0xfec00000 0x180000>;
283 ranges = <0 0xfec00000 0x100000>;
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-msm8226.dtsi27 #clock-cells = <0>;
33 #clock-cells = <0>;
40 #size-cells = <0>;
42 CPU0: cpu@0 {
46 reg = <0>;
109 memory@0 {
111 reg = <0x0 0x0>;
160 mboxes = <&apcs 0>;
212 reg = <0x3000000 0x100000>;
217 reg = <0x0dc00000 0x1900000>;
[all …]
H A Dqcom-msm8974.dtsi22 #clock-cells = <0>;
28 #clock-cells = <0>;
35 #size-cells = <0>;
38 CPU0: cpu@0 {
42 reg = <0>;
108 memory@0 {
110 reg = <0x0 0x0>;
135 mboxes = <&apcs 0>;
158 reg = <0x08000000 0x5100000>;
163 reg = <0x0d100000 0x100000>;
[all …]
/linux/arch/arm64/boot/dts/rockchip/
H A Drk356x.dtsi50 #size-cells = <0>;
52 cpu0: cpu@0 {
55 reg = <0x0 0x0>;
56 clocks = <&scmi_clk 0>;
60 i-cache-size = <0x8000>;
63 d-cache-size = <0x8000>;
72 reg = <0x0 0x100>;
76 i-cache-size = <0x8000>;
79 d-cache-size = <0x8000>;
88 reg = <0x0 0x200>;
[all …]