Searched +full:0 +full:xfd922d80 (Results 1 – 5 of 5) sorted by relevance
53 reg = <0xfd922a00 0xd4>,54 <0xfd922b00 0x2b0>,55 <0xfd922d80 0x7b>;61 #phy-cells = <0>;
59 reg = <0xfd922a00 0xd4>,60 <0xfd922b00 0x2b0>,61 <0xfd922d80 0x7b>;67 #phy-cells = <0>;
23 For DSI6G v2.0 onwards, we need also need the clock:38 - panel@0: Node of panel connected to this DSI controller.47 - pinctrl-0: the default pinctrl state (active)53 - remote-endpoint: For port@0, set to phandle of the connected panel/bridge's60 (DATAn, where n lies between 0 and 3). The clock lane position is fixed66 data-lanes = <3 0 1 2>;73 <0 1 2 3>74 <1 2 3 0>75 <2 3 0 1>76 <3 0 1 2>[all …]
27 #clock-cells = <0>;33 #clock-cells = <0>;40 #size-cells = <0>;42 CPU0: cpu@0 {46 reg = <0>;109 memory@0 {111 reg = <0x0 0x0>;160 mboxes = <&apcs 0>;212 reg = <0x3000000 0x100000>;217 reg = <0x0dc00000 0x1900000>;[all …]
22 #clock-cells = <0>;28 #clock-cells = <0>;35 #size-cells = <0>;38 CPU0: cpu@0 {42 reg = <0>;108 memory@0 {110 reg = <0x0 0x0>;135 mboxes = <&apcs 0>;158 reg = <0x08000000 0x5100000>;163 reg = <0x0d100000 0x100000>;[all …]