Searched +full:0 +full:xfd922a00 (Results 1 – 5 of 5) sorted by relevance
53 reg = <0xfd922a00 0xd4>,54 <0xfd922b00 0x2b0>,55 <0xfd922d80 0x7b>;61 #phy-cells = <0>;
58 reg = <0xfd922a00 0xd4>,59 <0xfd922b00 0x2b0>,60 <0xfd922d80 0x7b>;66 #phy-cells = <0>;
23 For DSI6G v2.0 onwards, we need also need the clock:38 - panel@0: Node of panel connected to this DSI controller.47 - pinctrl-0: the default pinctrl state (active)53 - remote-endpoint: For port@0, set to phandle of the connected panel/bridge's60 (DATAn, where n lies between 0 and 3). The clock lane position is fixed66 data-lanes = <3 0 1 2>;73 <0 1 2 3>74 <1 2 3 0>75 <2 3 0 1>76 <3 0 1 2>[all …]
67 #size-cells = <0>;68 reg = <0xfd922800 0x200>;70 panel: panel@0 {72 reg = <0>;83 #size-cells = <0>;84 reg = <0xfd922a00 0x200>;86 secondary: panel@0 {88 reg = <0>;
20 #clock-cells = <0>;26 #clock-cells = <0>;33 #size-cells = <0>;34 interrupts = <GIC_PPI 9 0xf04>;36 CPU0: cpu@0 {40 reg = <0>;108 reg = <0x0 0x0>;113 interrupts = <GIC_PPI 7 0xf04>;133 qcom,ipc = <&apcs 8 0>;[all...]