Searched +full:0 +full:xf8040000 (Results 1 – 6 of 6) sorted by relevance
99 reg = <0xf8050000 0x2000100 0xf8040000 0x1000101 0xc0000000 0x2000>;105 ranges = <0x81000000 0 0 0xc0002000 0 0x00010000>,106 <0x82000000 0 0xc0012000 0xc0012000 0 0x1ffee000>;108 bus-range = <0x00 0xff>;112 interrupt-map-mask = <0 0 0 0x7>;113 interrupt-map = <0 0 0 1 &intc GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,114 <0 0 0 2 &intc GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,115 <0 0 0 3 &intc GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,[all …]
55 #size-cells = <0>;57 cpu0: cpu@0 {60 reg = <0>;74 reg = <0xf8000000 0x48>;80 psci_version = <0x84000000>;81 cpu_on = <0x84000003>;82 system_reset = <0x84000009>;87 reg = <0xfaf00000 0x58>;92 #clock-cells = <0>;98 #clock-cells = <0>;[all …]
36 #size-cells = <0>;38 cpu@0 {40 reg = <0>;49 #clock-cells = <0>;55 #clock-cells = <0>;61 reg = <0x300000 0x10000>;62 ranges = <0 0x300000 0x10000>;75 reg = <0x80000000 0x300>;76 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;86 reg = <0x90000000 0x300>;[all …]
37 #size-cells = <0>;39 cpu@0 {42 reg = <0>;48 reg = <0x20000000 0x10000000>;54 #clock-cells = <0>;59 #clock-cells = <0>;65 reg = <0x00300000 0x100000>;68 ranges = <0 0x00300000 0x100000>;79 #size-cells = <0>;81 reg = <0x00500000 0x100000[all …]
44 #size-cells = <0>;46 cpu@0 {49 reg = <0>;55 reg = <0x20000000 0x10000000>;61 #clock-cells = <0>;62 clock-frequency = <0>;67 #clock-cells = <0>;68 clock-frequency = <0>;73 #clock-cells = <0>;80 reg = <0x00300000 0x8000>;[all …]
46 #size-cells = <0>;47 cpu@0 {50 reg = <0x0>;51 d-cache-size = <0x8000>; // L1, 32 KB52 i-cache-size = <0x8000>; // L1, 32 KB58 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 0>;63 reg = <0x20000000 0x8000000>;69 #clock-cells = <0>;70 clock-frequency = <0>;75 #clock-cells = <0>;[all …]