Searched +full:0 +full:xf6f00000 (Results 1 – 4 of 4) sorted by relevance
32 reg = <0 0xf2600000 0 0x10000>, <0 0xf6f00000 0 0x80000>;40 bus-range = <0 0xff>;41 ranges = <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000 /* downstream I/O */42 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>; /* non-prefetchable memory */43 interrupt-map-mask = <0 0 0 0>;44 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
83 reg = <0xf2600000 0x10000>, <0xf6f00000 0x80000>;92 ranges = <0x81000000 0 0xf9000000 0xf9000000 0 0x10000>, /* downstream I/O */93 <0x82000000 0 0xf6000000 0xf6000000 0 0xf00000>; /* non-prefetchable memory */94 interrupt-map-mask = <0 0 0 0>;95 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
17 #clock-cells = <0>;21 pinctrl-0 = <&divclk1_default>;26 #clock-cells = <0>;31 pinctrl-0 = <&divclk4_pin_a>;59 pinctrl-0 = <&irled_default>;64 reg = <0x0 0x88800000 0x0 0x1400000>;68 /* This platform has all PIL regions offset by 0x1400000 */71 reg = <0x0 0x89c00000 0x0 0x6200000>;77 reg = <0x0 0x8fe00000 0x0 0x1b00000>;83 reg = <0x0 0x91900000 0x0 0xa00000>;[all …]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]