Searched +full:0 +full:xf0800000 (Results 1 – 9 of 9) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/net/ |
H A D | fsl,enetc-ierb.yaml | 37 reg = <0xf0800000 0x10000>;
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H A D | fsl-enetc.txt | 37 ethernet@0,0 { 39 reg = <0x000000 0 0 0 0>; 45 #size-cells = <0>; 47 reg = <0x2>; 69 ethernet@0,0 { 71 reg = <0x000000 0 0 0 0>; 76 mdio@0,3 { 78 reg = <0x000300 0 0 0 0>; 80 #size-cells = <0>; 82 reg = <0x2>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/nuvoton/ |
H A D | nuvoton-common-npcm8xx.dtsi | 22 reg = <0x0 0xf0800000 0x0 0x1000>; 27 reg = <0x0 0xdfff9000 0x0 0x1000>, 28 <0x [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/amazon/ |
H A D | alpine-v3.dtsi | 21 #size-cells = <0>; 23 cpu@0 { 26 reg = <0x0>; 28 d-cache-size = <0x8000>; 31 i-cache-size = <0xc000>; 40 reg = <0x1>; 42 d-cache-size = <0x8000>; 45 i-cache-size = <0xc000>; 54 reg = <0x2>; 56 d-cache-size = <0x8000>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | sdm845-lg-common.dtsi | 42 reg = <0 0xb2000000 0 0x1800000>; 47 reg = <0 0x8c415000 0 0x2000>; 52 reg = <0 0x8c40000 [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | fsl-ls1028a.dtsi | 23 #size-cells = <0>; 25 cpu0: cpu@0 { 28 reg = <0x0>; 30 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 31 i-cache-size = <0xc000>; 34 d-cache-size = <0x8000>; 45 reg = <0x1>; 47 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 48 i-cache-size = <0xc000>; 51 d-cache-size = <0x8000>; [all …]
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/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM/ |
H A D | EmulateInstructionARM.cpp | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 39 #define AlignPC(pc_val) (pc_val & 0xFFFFFFFC) in LLDB_PLUGIN_DEFINE_ADV() 47 ::memset(®_info, 0, sizeof(RegisterInfo)); in LLDB_PLUGIN_DEFINE_ADV() 234 // FPA Registers 0-7 in LLDB_PLUGIN_DEFINE_ADV() 260 // Intel wireless MMX general purpose registers 0 - 7 XScale accumulator in LLDB_PLUGIN_DEFINE_ADV() 261 // register 0 - 7 (they do overlap with wCGR0 - wCGR7) in LLDB_PLUGIN_DEFINE_ADV() 287 // Intel wireless MMX data registers 0 - 15 in LLDB_PLUGIN_DEFINE_ADV() 423 // Intel wireless MMX control register in co-processor 0 - 7 in LLDB_PLUGIN_DEFINE_ADV() 604 // Valid return values are {1, 2, 3, 4}, with 0 signifying an error condition. 609 return 0; in CountITSize() [all …]
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/freebsd/tools/test/iconv/ref/ |
H A D | UTF-32BE-rev | 1 0x00 = 0x00000000 2 0x01 = 0x01000000 3 0x02 = 0x02000000 4 0x03 = 0x03000000 5 0x04 = 0x04000000 6 0x05 = 0x05000000 7 0x06 = 0x06000000 8 0x07 = 0x07000000 9 0x08 = 0x08000000 10 0x09 = 0x09000000 [all …]
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/freebsd/sys/dev/qlnx/qlnxe/ |
H A D | ecore_init_values.h | 35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */ 36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */ 37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */ 38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */ 40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */ 41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */ 42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */ 43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */ 44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */ 45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */ [all …]
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