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/linux/Documentation/devicetree/bindings/usb/
H A Dxlnx,usb2.yaml45 interrupts = <0x0 0x39 0x1>;
46 reg = <0xee000000 0xc00>;
H A Drenesas,usb-xhci.yaml114 reg = <0xee000000 0xc00>;
/linux/arch/powerpc/boot/dts/fsl/
H A Dp1010rdb_36b.dtsi41 ranges = <0x0 0x0 0xf 0xee000000 0x02000000
42 0x1 0x0 0xf 0xff800000 0x00010000
43 0x3 0x0 0xf 0xffb00000 0x00000020>;
44 reg = <0xf 0xffe1e000 0 0x2000>;
48 ranges = <0x0 0xf 0xffe00000 0x100000>;
52 reg = <0xf 0xffe09000 0 0x1000>;
53 ranges = <0x2000000 0x0 0xc0000000 0xc 0x20000000 0x0 0x20000000
54 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
55 pcie@0 {
56 ranges = <0x2000000 0x0 0xc0000000
[all …]
H A Dp1010rdb_32b.dtsi41 ranges = <0x0 0x0 0x0 0xee000000 0x02000000
42 0x1 0x0 0x0 0xff800000 0x00010000
43 0x3 0x0 0x0 0xffb00000 0x00000020>;
44 reg = <0x0 0xffe1e000 0 0x2000>;
48 ranges = <0x0 0x0 0xffe00000 0x100000>;
52 reg = <0 0xffe09000 0 0x1000>;
53 ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
54 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
55 pcie@0 {
56 ranges = <0x2000000 0x0 0xa0000000
[all …]
/linux/Documentation/devicetree/bindings/memory-controllers/fsl/
H A Dfsl,ifc.yaml21 pattern: "^memory-controller@[0-9a-f]+$"
89 reg = <0x0 0xffe1e000 0 0x2000>;
94 ranges = <0x0 0x0 0x0 0xee000000 0x02000000>,
95 <0x1 0x0 0x0 0xffa00000 0x00010000>,
96 <0x3 0x0 0x0 0xffb00000 0x00020000>;
98 flash@0,0 {
102 reg = <0x0 0x0 0x2000000>;
106 partition@0 {
108 reg = <0x0 0x02000000>;
/linux/drivers/net/ethernet/ti/
H A Dnetcp_xgbepcsr.c13 #define XGBE_CTRL_OFFSET 0x0c
14 #define XGBE_SGMII_1_OFFSET 0x0114
15 #define XGBE_SGMII_2_OFFSET 0x0214
18 #define PCSR_CPU_CTRL_OFFSET 0x1fd0
31 #define PHY_A(serdes) 0
40 {0x0000, 0x00800002, 0x00ff00ff},
41 {0x0014, 0x00003838, 0x0000ffff},
42 {0x0060, 0x1c44e438, 0xffffffff},
43 {0x0064, 0x00c18400, 0x00ffffff},
44 {0x0068, 0x17078200, 0xffffff00},
[all …]
/linux/crypto/
H A Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/linux/arch/arm/boot/dts/renesas/
H A Dr8a7743.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
31 #clock-cells = <0>;
32 clock-frequency = <0>;
37 #clock-cells = <0>;
38 clock-frequency = <0>;
44 #clock-cells = <0>;
46 clock-frequency = <0>;
51 #size-cells = <0>;
[all …]
H A Dr8a7744.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
31 #clock-cells = <0>;
32 clock-frequency = <0>;
37 #clock-cells = <0>;
38 clock-frequency = <0>;
44 #clock-cells = <0>;
46 clock-frequency = <0>;
51 #size-cells = <0>;
[all …]
H A Dr8a7790.dtsi41 * The external audio clocks are configured as 0 Hz fixed frequency
47 #clock-cells = <0>;
48 clock-frequency = <0>;
52 #clock-cells = <0>;
53 clock-frequency = <0>;
57 #clock-cells = <0>;
58 clock-frequency = <0>;
64 #clock-cells = <0>;
66 clock-frequency = <0>;
71 #size-cells = <0>;
[all …]
H A Dr8a7742.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
35 #clock-cells = <0>;
36 clock-frequency = <0>;
42 #clock-cells = <0>;
44 clock-frequency = <0>;
49 #size-cells = <0>;
[all …]
H A Dr8a7791.dtsi40 * The external audio clocks are configured as 0 Hz fixed frequency
46 #clock-cells = <0>;
47 clock-frequency = <0>;
51 #clock-cells = <0>;
52 clock-frequency = <0>;
56 #clock-cells = <0>;
57 clock-frequency = <0>;
63 #clock-cells = <0>;
65 clock-frequency = <0>;
70 #size-cells = <0>;
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a774c0.dtsi18 * The external audio clocks are configured as 0 Hz fixed frequency
24 #clock-cells = <0>;
25 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
36 #clock-cells = <0>;
37 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
67 #size-cells = <0>;
[all …]
H A Dr8a77990.dtsi18 * The external audio clocks are configured as 0 Hz fixed frequency
24 #clock-cells = <0>;
25 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
36 #clock-cells = <0>;
37 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
67 #size-cells = <0>;
[all …]
H A Dr8a774a1.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
31 #clock-cells = <0>;
32 clock-frequency = <0>;
37 #clock-cells = <0>;
38 clock-frequency = <0>;
44 #clock-cells = <0>;
45 clock-frequency = <0>;
48 cluster0_opp: opp-table-0 {
[all …]
H A Dr8a774b1.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
31 #clock-cells = <0>;
32 clock-frequency = <0>;
37 #clock-cells = <0>;
38 clock-frequency = <0>;
44 #clock-cells = <0>;
45 clock-frequency = <0>;
48 cluster0_opp: opp-table-0 {
[all …]
H A Dr8a77961.dtsi18 * The external audio clocks are configured as 0 Hz fixed frequency
24 #clock-cells = <0>;
25 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
36 #clock-cells = <0>;
37 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
47 cluster0_opp: opp-table-0 {
[all …]
H A Dr8a774e1.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
31 #clock-cells = <0>;
32 clock-frequency = <0>;
37 #clock-cells = <0>;
38 clock-frequency = <0>;
44 #clock-cells = <0>;
45 clock-frequency = <0>;
48 cluster0_opp: opp-table-0 {
[all …]
H A Dr8a77960.dtsi18 * The external audio clocks are configured as 0 Hz fixed frequency
24 #clock-cells = <0>;
25 clock-frequency = <0>;
30 #clock-cells = <0>;
31 clock-frequency = <0>;
36 #clock-cells = <0>;
37 clock-frequency = <0>;
43 #clock-cells = <0>;
44 clock-frequency = <0>;
47 cluster0_opp: opp-table-0 {
[all …]
H A Dr8a77965.dtsi23 * The external audio clocks are configured as 0 Hz fixed frequency
29 #clock-cells = <0>;
30 clock-frequency = <0>;
35 #clock-cells = <0>;
36 clock-frequency = <0>;
41 #clock-cells = <0>;
42 clock-frequency = <0>;
48 #clock-cells = <0>;
49 clock-frequency = <0>;
52 cluster0_opp: opp-table-0 {
[all …]
H A Dr8a77951.dtsi23 * The external audio clocks are configured as 0 Hz fixed frequency
29 #clock-cells = <0>;
30 clock-frequency = <0>;
35 #clock-cells = <0>;
36 clock-frequency = <0>;
41 #clock-cells = <0>;
42 clock-frequency = <0>;
48 #clock-cells = <0>;
49 clock-frequency = <0>;
52 cluster0_opp: opp-table-0 {
[all …]
/linux/drivers/net/ethernet/3com/
H A D3c59x.c26 * NOTE: If you make 'vortex_debug' a constant (#define vortex_debug 0) the driver shrinks by 2k
65 /* Put out somewhat more debugging messages. (0: no msg, 1 minimal .. 6). */
119 #define VORTEX_TOTAL_SIZE 0x20
120 #define BOOMERANG_TOTAL_SIZE 0x40
215 EEPROM_8BIT=0x10, /* AKPM: Uses 0x230 as the base bitmaps for EEPROM reads */
216 HAS_PWR_CTRL=0x20, HAS_MII=0x40, HAS_NWAY=0x80, HAS_CB_FNS=0x100,
217 INVERT_MII_PWR=0x200, INVERT_LED_PWR=0x400, MAX_COLLISION_RESET=0x800,
218 EEPROM_OFFSET=0x1000, HAS_HWCKSM=0x2000, WNO_XCVR_PWR=0x4000,
219 EXTRA_PREAMBLE=0x8000, EEPROM_RESET=0x10000, };
222 CH_3C590 = 0,
[all …]