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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dqoriq-fman-0-1g-0.dtsi2 * QorIQ FMan 1g port #0 device tree stub [ controller @ offset 0x400000 ]
37 cell-index = <0x8>;
39 reg = <0x88000 0x1000>;
43 cell-index = <0x28>;
45 reg = <0xa8000 0x1000>;
49 cell-index = <0>;
51 reg = <0xe0000 0x1000>;
59 #size-cells = <0>;
61 reg = <0xe1120 0xee0>;
62 interrupts = <100 2 0 0>;
[all …]
H A Dqoriq-fman-1-1g-0.dtsi2 * QorIQ FMan 1g port #0 device tree stub [ controller @ offset 0x500000 ]
37 cell-index = <0x8>;
39 reg = <0x88000 0x1000>;
43 cell-index = <0x28>;
45 reg = <0xa8000 0x1000>;
49 cell-index = <0>;
51 reg = <0xe0000 0x1000>;
59 #size-cells = <0>;
61 reg = <0xe1120 0xee0>;
64 reg = <0x8>;
H A Dqoriq-fman-0-1g-4.dtsi2 * QorIQ FMan 1g port #4 device tree stub [ controller @ offset 0x400000 ]
37 cell-index = <0xc>;
39 reg = <0x8c000 0x1000>;
43 cell-index = <0x2c>;
45 reg = <0xac000 0x1000>;
51 reg = <0xe8000 0x1000>;
59 #size-cells = <0>;
61 reg = <0xe9120 0xee0>;
64 reg = <0x8>;
H A Dqoriq-fman-0-1g-1.dtsi2 * QorIQ FMan 1g port #1 device tree stub [ controller @ offset 0x400000 ]
37 cell-index = <0x9>;
39 reg = <0x89000 0x1000>;
43 cell-index = <0x29>;
45 reg = <0xa9000 0x1000>;
51 reg = <0xe2000 0x1000>;
59 #size-cells = <0>;
61 reg = <0xe3120 0xee0>;
64 reg = <0x8>;
H A Dqoriq-fman-0-1g-2.dtsi2 * QorIQ FMan 1g port #2 device tree stub [ controller @ offset 0x400000 ]
37 cell-index = <0xa>;
39 reg = <0x8a000 0x1000>;
43 cell-index = <0x2a>;
45 reg = <0xaa000 0x1000>;
51 reg = <0xe4000 0x1000>;
59 #size-cells = <0>;
61 reg = <0xe5120 0xee0>;
64 reg = <0x8>;
H A Dqoriq-fman-0-1g-3.dtsi2 * QorIQ FMan 1g port #3 device tree stub [ controller @ offset 0x400000 ]
37 cell-index = <0xb>;
39 reg = <0x8b000 0x1000>;
43 cell-index = <0x2b>;
45 reg = <0xab000 0x1000>;
51 reg = <0xe6000 0x1000>;
59 #size-cells = <0>;
61 reg = <0xe7120 0xee0>;
64 reg = <0x8>;
H A Dqoriq-fman-1-1g-1.dtsi2 * QorIQ FMan 1g port #1 device tree stub [ controller @ offset 0x500000 ]
37 cell-index = <0x9>;
39 reg = <0x89000 0x1000>;
43 cell-index = <0x29>;
45 reg = <0xa9000 0x1000>;
51 reg = <0xe2000 0x1000>;
59 #size-cells = <0>;
61 reg = <0xe3120 0xee0>;
64 reg = <0x8>;
H A Dqoriq-fman-1-1g-2.dtsi2 * QorIQ FMan 1g port #2 device tree stub [ controller @ offset 0x500000 ]
37 cell-index = <0xa>;
39 reg = <0x8a000 0x1000>;
43 cell-index = <0x2a>;
45 reg = <0xaa000 0x1000>;
51 reg = <0xe4000 0x1000>;
59 #size-cells = <0>;
61 reg = <0xe5120 0xee0>;
64 reg = <0x8>;
H A Dqoriq-fman-1-1g-3.dtsi2 * QorIQ FMan 1g port #3 device tree stub [ controller @ offset 0x500000 ]
37 cell-index = <0xb>;
39 reg = <0x8b000 0x1000>;
43 cell-index = <0x2b>;
45 reg = <0xab000 0x1000>;
51 reg = <0xe6000 0x1000>;
59 #size-cells = <0>;
61 reg = <0xe7120 0xee0>;
64 reg = <0x8>;
H A Dqoriq-fman-1-1g-4.dtsi2 * QorIQ FMan 1g port #4 device tree stub [ controller @ offset 0x500000 ]
37 cell-index = <0xc>;
39 reg = <0x8c000 0x1000>;
43 cell-index = <0x2c>;
45 reg = <0xac000 0x1000>;
51 reg = <0xe8000 0x1000>;
59 #size-cells = <0>;
61 reg = <0xe9120 0xee0>;
64 reg = <0x8>;
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dfsl,fman-mdio.yaml93 reg = <0xf1000 0x1000>;
94 interrupts = <101 2 0 0>;
100 reg = <0xe3120 0xee0>;
103 #size-cells = <0>;
106 reg = <0x8>;
114 reg = <0xf1000 0x1000>;
117 #size-cells = <0>;
119 pcsphy6: ethernet-phy@0 {
120 reg = <0x0>;
H A Dfsl-fman.txt28 FMan block. The offset is 0xc4 from the beginning of the
29 Frame Processing Manager memory map (0xc3000 from the
44 DEVDISR[1] 1 0
49 DCFG_DEVDISR2[6] 1 0
56 DCFG_CCSR_DEVDISR2[24] 1 0
148 muram@0 {
150 ranges = <0 0x000000 0x28000>;
215 cell-index = <0x28>;
217 reg = <0xa8000 0x1000>;
221 cell-index = <0x8>;
[all …]
/freebsd/sys/dts/powerpc/
H A Dp3041si.dtsi103 #size-cells = <0>;
105 cpu0: PowerPC,e500mc@0 {
107 reg = <0>;
145 dcsr-epu@0 {
147 interrupts = <52 2 0 0
148 84 2 0 0
149 85 2 0 0>;
151 reg = <0x0 0x1000>;
155 reg = <0x1000 0x1000 0x1000000 0x8000>;
159 reg = <0x2000 0x1000>;
[all …]
H A Dp2041si.dtsi102 #size-cells = <0>;
104 cpu0: PowerPC,e500mc@0 {
106 reg = <0>;
144 dcsr-epu@0 {
146 interrupts = <52 2 0 0
147 84 2 0 0
148 85 2 0 0>;
150 reg = <0x0 0x1000>;
154 reg = <0x1000 0x1000 0x1000000 0x8000>;
158 reg = <0x2000 0x1000>;
[all …]
H A Dp5020si.dtsi109 #size-cells = <0>;
111 cpu0: PowerPC,e5500@0 {
113 reg = <0>;
135 dcsr-epu@0 {
137 interrupts = <52 2 0 0
138 84 2 0 0
139 85 2 0 0>;
141 reg = <0x0 0x1000>;
145 reg = <0x1000 0x1000 0x1000000 0x8000>;
149 reg = <0x2000 0x1000>;
[all …]
H A Dp3041ds.dts60 reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
64 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
68 bman-portal@0 {
93 buffer-pool@0 {
95 fsl,bpid = <0>;
96 fsl,bpool-cfg = <0 0x100 0 1 0 0x100>;
101 qportal0: qman-portal@0 {
188 flash@0 {
192 reg = <0>;
196 reg = <0x00000000 0x00100000>;
[all …]
H A Dp5020ds.dts60 reg = <0x00000000 0x00000000 0x00000000 0x80000000>;
64 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
68 bman-portal@0 {
91 buffer-pool@0 {
93 fsl,bpid = <0>;
94 fsl,bpool-cfg = <0 0x100 0 1 0 0x100>;
99 qportal0: qman-portal@0 {
184 flash@0 {
188 reg = <0>;
192 reg = <0x00000000 0x00100000>;
[all …]
/freebsd/sys/arm64/coresight/
H A Dcoresight_tmc.h34 #define TMC_RSZ 0x004 /* RAM Size Register */
35 #define TMC_STS 0x00C /* Status Register */
41 #define STS_FULL (1 << 0)
42 #define TMC_RRD 0x010 /* RAM Read Data Register */
43 #define TMC_RRP 0x014 /* RAM Read Pointer Register */
44 #define TMC_RWP 0x018 /* RAM Write Pointer Register */
45 #define TMC_TRG 0x01C /* Trigger Counter Register */
46 #define TMC_CTL 0x020 /* Control Register */
47 #define CTL_TRACECAPTEN (1 << 0) /* Controls trace capture. */
48 #define TMC_RWD 0x024 /* RAM Write Data Register */
[all …]
/freebsd/sys/dev/rtwn/rtl8188e/
H A Dr88e_priv.h39 { 0x026, 0x41 }, { 0x027, 0x35 }, { 0x040, 0x00 }, { 0x428, 0x0a },
40 { 0x429, 0x10 }, { 0x430, 0x00 }, { 0x431, 0x01 }, { 0x432, 0x02 },
41 { 0x433, 0x04 }, { 0x434, 0x05 }, { 0x435, 0x06 }, { 0x436, 0x07 },
42 { 0x437, 0x08 }, { 0x438, 0x00 }, { 0x439, 0x00 }, { 0x43a, 0x01 },
43 { 0x43b, 0x02 }, { 0x43c, 0x04 }, { 0x43d, 0x05 }, { 0x43e, 0x06 },
44 { 0x43f, 0x07 }, { 0x440, 0x5d }, { 0x441, 0x01 }, { 0x442, 0x00 },
45 { 0x444, 0x15 }, { 0x445, 0xf0 }, { 0x446, 0x0f }, { 0x447, 0x00 },
46 { 0x458, 0x41 }, { 0x459, 0xa8 }, { 0x45a, 0x72 }, { 0x45b, 0xb9 },
47 { 0x460, 0x66 }, { 0x461, 0x66 }, { 0x480, 0x08 }, { 0x4c8, 0xff },
48 { 0x4c9, 0x08 }, { 0x4cc, 0xff }, { 0x4cd, 0xff }, { 0x4ce, 0x01 },
[all …]
H A Dr88e_calib.c71 rtwn_bb_write(sc, R92C_FPGA0_IQK, 0); in r88e_iq_calib_chain()
72 rtwn_rf_write(sc, 0, R88E_RF_WE_LUT, 0x800a0); in r88e_iq_calib_chain()
73 rtwn_rf_write(sc, 0, R92C_RF_RCK_OS, 0x30000); in r88e_iq_calib_chain()
74 rtwn_rf_write(sc, 0, R92C_RF_TXPA_G(0), 0xf); in r88e_iq_calib_chain()
75 rtwn_rf_write(sc, 0, R92C_RF_TXPA_G(1), 0xf117b); in r88e_iq_calib_chain()
76 rtwn_bb_write(sc, R92C_FPGA0_IQK, 0x80800000); in r88e_iq_calib_chain()
79 rtwn_bb_write(sc, R92C_TX_IQK, 0x01007c00); in r88e_iq_calib_chain()
80 rtwn_bb_write(sc, R92C_RX_IQK, 0x81004800); in r88e_iq_calib_chain()
82 /* IQ calibration settings for chain 0. */ in r88e_iq_calib_chain()
83 rtwn_bb_write(sc, R92C_TX_IQK_TONE(0), 0x10008c1c); in r88e_iq_calib_chain()
[all …]
/freebsd/sys/dev/rtwn/rtl8192c/pci/
H A Dr92ce_calib.c76 if (chain == 0) { /* IQ calibration for chain 0. */ in r92ce_iq_calib_chain()
77 /* IQ calibration settings for chain 0. */ in r92ce_iq_calib_chain()
78 rtwn_bb_write(sc, R92C_TX_IQK_TONE(0), 0x10008c1f); in r92ce_iq_calib_chain()
79 rtwn_bb_write(sc, R92C_RX_IQK_TONE(0), 0x10008c1f); in r92ce_iq_calib_chain()
80 rtwn_bb_write(sc, R92C_TX_IQK_PI(0), 0x82140102); in r92ce_iq_calib_chain()
83 rtwn_bb_write(sc, R92C_RX_IQK_PI(0), 0x28160202); in r92ce_iq_calib_chain()
85 rtwn_bb_write(sc, R92C_TX_IQK_TONE(1), 0x10008c22); in r92ce_iq_calib_chain()
86 rtwn_bb_write(sc, R92C_RX_IQK_TONE(1), 0x10008c22); in r92ce_iq_calib_chain()
87 rtwn_bb_write(sc, R92C_TX_IQK_PI(1), 0x82140102); in r92ce_iq_calib_chain()
88 rtwn_bb_write(sc, R92C_RX_IQK_PI(1), 0x28160202); in r92ce_iq_calib_chain()
[all …]
/freebsd/sys/dev/rtwn/rtl8192c/usb/
H A Dr92cu_priv.h29 { 0x420, 0x80 }, { 0x423, 0x00 }, { 0x430, 0x00 }, { 0x431, 0x00 },
30 { 0x432, 0x00 }, { 0x433, 0x01 }, { 0x434, 0x04 }, { 0x435, 0x05 },
31 { 0x436, 0x06 }, { 0x437, 0x07 }, { 0x438, 0x00 }, { 0x439, 0x00 },
32 { 0x43a, 0x00 }, { 0x43b, 0x01 }, { 0x43c, 0x04 }, { 0x43d, 0x05 },
33 { 0x43e, 0x06 }, { 0x43f, 0x07 }, { 0x440, 0x5d }, { 0x441, 0x01 },
34 { 0x442, 0x00 }, { 0x444, 0x15 }, { 0x445, 0xf0 }, { 0x446, 0x0f },
35 { 0x447, 0x00 }, { 0x458, 0x41 }, { 0x459, 0xa8 }, { 0x45a, 0x72 },
36 { 0x45b, 0xb9 }, { 0x460, 0x66 }, { 0x461, 0x66 }, { 0x462, 0x08 },
37 { 0x463, 0x03 }, { 0x4c8, 0xff }, { 0x4c9, 0x08 }, { 0x4cc, 0xff },
38 { 0x4cd, 0xff }, { 0x4ce, 0x01 }, { 0x500, 0x26 }, { 0x501, 0xa2 },
[all …]
/freebsd/sys/dev/rtwn/rtl8192c/
H A Dr92c_calib.c76 if (chain == 0) { /* IQ calibration for chain 0. */ in r92c_iq_calib_chain()
77 /* IQ calibration settings for chain 0. */ in r92c_iq_calib_chain()
78 rtwn_bb_write(sc, R92C_TX_IQK_TONE(0), 0x10008c1f); in r92c_iq_calib_chain()
79 rtwn_bb_write(sc, R92C_RX_IQK_TONE(0), 0x10008c1f); in r92c_iq_calib_chain()
80 rtwn_bb_write(sc, R92C_TX_IQK_PI(0), 0x82140102); in r92c_iq_calib_chain()
83 rtwn_bb_write(sc, R92C_RX_IQK_PI(0), 0x28160202); in r92c_iq_calib_chain()
85 rtwn_bb_write(sc, R92C_TX_IQK_TONE(1), 0x10008c22); in r92c_iq_calib_chain()
86 rtwn_bb_write(sc, R92C_RX_IQK_TONE(1), 0x10008c22); in r92c_iq_calib_chain()
87 rtwn_bb_write(sc, R92C_TX_IQK_PI(1), 0x82140102); in r92c_iq_calib_chain()
88 rtwn_bb_write(sc, R92C_RX_IQK_PI(1), 0x28160202); in r92c_iq_calib_chain()
[all …]
H A Dr92c_priv.h41 #define R92C_COND_RTL8188CE 0x01
42 #define R92C_COND_RTL8188CU 0x02
43 #define R92C_COND_RTL8188RU 0x04
44 #define R92C_COND_RTL8192CE 0x08
45 #define R92C_COND_RTL8192CU 0x10
51 0xd04
53 0xd08, 0xd0c, 0xd10, 0xd14, 0xd18, 0xd2c, 0xd30, 0xd34, 0xd38,
54 0xd3c, 0xd40, 0xd44, 0xd48, 0xd4c, 0xd50, 0xd54, 0xd58, 0xd5c,
55 0xd60, 0xd64, 0xd68, 0xd6c, 0xd70, 0xd74, 0xd78, 0xe00, 0xe04,
56 0xe08, 0xe10, 0xe14, 0xe18, 0xe1c, 0xe28, 0xe30, 0xe34, 0xe38,
[all …]
/freebsd/sys/dev/rtwn/rtl8192e/
H A Dr92e_priv.h34 { 0x011, 0xeb }, { 0x012, 0x07 }, { 0x014, 0x75 }, { 0x303, 0xa7 },
35 { 0x428, 0x0a }, { 0x429, 0x10 }, { 0x430, 0x00 }, { 0x431, 0x00 },
36 { 0x432, 0x00 }, { 0x433, 0x01 }, { 0x434, 0x04 }, { 0x435, 0x05 },
37 { 0x436, 0x07 }, { 0x437, 0x08 }, { 0x43c, 0x04 }, { 0x43d, 0x05 },
38 { 0x43e, 0x07 }, { 0x43f, 0x08 }, { 0x440, 0x5d }, { 0x441, 0x01 },
39 { 0x442, 0x00 }, { 0x444, 0x10 }, { 0x445, 0x00 }, { 0x446, 0x00 },
40 { 0x447, 0x00 }, { 0x448, 0x00 }, { 0x449, 0xf0 }, { 0x44a, 0x0f },
41 { 0x44b, 0x3e }, { 0x44c, 0x10 }, { 0x44d, 0x00 }, { 0x44e, 0x00 },
42 { 0x44f, 0x00 }, { 0x450, 0x00 }, { 0x451, 0xf0 }, { 0x452, 0x0f },
43 { 0x453, 0x00 }, { 0x456, 0x5e }, { 0x460, 0x66 }, { 0x461, 0x66 },
[all …]

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