Searched +full:0 +full:xe66d8000 (Results 1 – 16 of 16) sorted by relevance
67 const: 0104 #size-cells = <0>;106 reg = <0 0xe66d8000>;110 reg = <0x31>, <0x41>, <0x51>;123 #size-cells = <0>;125 reg = <0 0xe66d8000>;129 reg = <0x31>, <0x41>;
32 const: 093 Index of the MAX9286 gpio output line (0 or 1) that controls Power over97 the gpio line index (0 or 1) and the second being the gpio line polarity114 port@0:116 description: GMSL Input 0157 "^i2c@[0-3]$":175 const: 0208 "^port[0-3]-poc-supply$":229 "^port[0-3]-poc-supply$": false236 "^port[0-3]-poc-supply$": false[all …]
22 #clock-cells = <0>;23 clock-frequency = <0>;28 #size-cells = <0>;30 a53_0: cpu@0 {33 reg = <0>;60 #clock-cells = <0>;62 clock-frequency = <0>;67 #clock-cells = <0>;69 clock-frequency = <0>;87 #clock-cells = <0>;[all …]
17 cluster01_opp: opp-table-0 {73 #size-cells = <0>;113 a55_0: cpu@0 {115 reg = <0>;127 reg = <0x100>;139 reg = <0x10000>;151 reg = <0x10100>;163 reg = <0x20000>;175 reg = <0x20100>;187 reg = <0x30000>;[all …]
22 #clock-cells = <0>;23 clock-frequency = <0>;28 #size-cells = <0>;30 a53_0: cpu@0 {33 reg = <0>;80 #clock-cells = <0>;82 clock-frequency = <0>;87 #clock-cells = <0>;89 clock-frequency = <0>;95 #clock-cells = <0>;[all …]
18 * The external audio clocks are configured as 0 Hz fixed frequency24 #clock-cells = <0>;25 clock-frequency = <0>;30 #clock-cells = <0>;31 clock-frequency = <0>;36 #clock-cells = <0>;37 clock-frequency = <0>;43 #clock-cells = <0>;44 clock-frequency = <0>;67 #size-cells = <0>;[all …]
20 #clock-cells = <0>;21 clock-frequency = <0>;27 #clock-cells = <0>;28 clock-frequency = <0>;31 cluster0_opp: opp-table-0 {66 #size-cells = <0>;88 a76_0: cpu@0 {90 reg = <0>;102 reg = <0x100>;114 reg = <0x10000>;[all …]
20 #clock-cells = <0>;21 clock-frequency = <0>;26 #size-cells = <0>;28 a76_0: cpu@0 {30 reg = <0>;37 L3_CA76_0: cache-controller-0 {47 #clock-cells = <0>;49 clock-frequency = <0>;54 #clock-cells = <0>;56 clock-frequency = <0>;[all …]
19 * The external audio clocks are configured as 0 Hz fixed frequency25 #clock-cells = <0>;26 clock-frequency = <0>;31 #clock-cells = <0>;32 clock-frequency = <0>;37 #clock-cells = <0>;38 clock-frequency = <0>;44 #clock-cells = <0>;45 clock-frequency = <0>;48 cluster0_opp: opp-table-0 {[all …]
18 * The external audio clocks are configured as 0 Hz fixed frequency24 #clock-cells = <0>;25 clock-frequency = <0>;30 #clock-cells = <0>;31 clock-frequency = <0>;36 #clock-cells = <0>;37 clock-frequency = <0>;43 #clock-cells = <0>;44 clock-frequency = <0>;47 cluster0_opp: opp-table-0 {[all …]
23 * The external audio clocks are configured as 0 Hz fixed frequency29 #clock-cells = <0>;30 clock-frequency = <0>;35 #clock-cells = <0>;36 clock-frequency = <0>;41 #clock-cells = <0>;42 clock-frequency = <0>;48 #clock-cells = <0>;49 clock-frequency = <0>;52 cluster0_opp: opp-table-0 {[all …]