Searched +full:0 +full:xe450 (Results 1 – 4 of 4) sorted by relevance
7 title: Rockchip USB2.0 phy with inno IP block37 const: 089 const: 0112 const: 0229 reg = <0xe450 0x10>;233 #clock-cells = <0>;236 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;238 #phy-cells = <0>;242 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,243 <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,[all …]
3 * Rockchip USB2.0 PHY with Innosilicon IP block driver43 PHY_STATE_HS_ONLINE = 0,62 USB_CHG_STATE_UNDEFINED = 0,228 * struct rockchip_usb2phy - usb2.0 phy driver data.312 return 0; in rockchip_usb2phy_reset()339 return 0; in rockchip_usb2phy_clk480m_prepare()391 int ret = 0; in rockchip_usb2phy_clk480m_register()393 init.flags = 0; in rockchip_usb2phy_clk480m_register()400 for (i = 0; i < rphy->num_clks; i++) { in rockchip_usb2phy_clk480m_register()413 init.num_parents = 0; in rockchip_usb2phy_clk480m_register()[all …]
72 description: Use rockchip,rk3588-vo{0,1}-grf instead.220 "^phy@[0-9a-f]+$":265 "usb2phy@[0-9a-f]+$":328 reg = <0xff770000 0x10000>;339 #phy-cells = <0>;353 reg = <0xf780 0x20>;357 #phy-cells = <0>;362 reg = <0xe450 0x10>;365 #clock-cells = <0>;369 #phy-cells = <0>;[all …]
51 #size-cells = <0>;79 cpu_l0: cpu@0 {82 reg = <0x0 0x0>;89 i-cache-size = <0x8000>;92 d-cache-size = <0x8000>;101 reg = <0x0 0x1>;108 i-cache-size = <0x8000>;111 d-cache-size = <0x8000>;120 reg = <0x0 0x2>;127 i-cache-size = <0x8000>;[all …]