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Searched +full:0 +full:xe0100000 (Results 1 – 12 of 12) sorted by relevance

/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dfsl,qe.yaml106 reg = <0xe0100000 0x480>;
107 ranges = <0 0xe0100000 0x00100000>;
110 brg-frequency = <0>;
111 bus-frequency = <0x179a7b00>;
113 0x04 0x05 0x0c 0x0d 0x14 0x15 0x1c 0x1d
114 0x24 0x25 0x2c 0x2d 0x34 0x35 0x88 0x89
115 0x98 0x99 0xa8 0xa9 0xb8 0xb9 0xc8 0xc9
116 0xd8 0xd9 0xe8 0xe9>;
120 reg = <0x80 0x80>;
123 interrupts = <95 2 0 0 94 2 0 0>;
[all …]
/linux/Documentation/devicetree/bindings/crypto/
H A Damd-ccp.txt14 reg = <0 0xe0100000 0 0x10000>;
16 interrupts = <0 3 4>;
/linux/Documentation/devicetree/bindings/clock/
H A Dsamsung,s5pv210-clock.yaml59 xxti: clock-0 {
61 clock-frequency = <0>;
63 #clock-cells = <0>;
68 clock-frequency = <0>;
70 #clock-cells = <0>;
75 reg = <0xe0100000 0x10000>;
/linux/arch/arm/mach-spear/
H A Dspear.h18 #define SPEAR_ICM1_2_BASE UL(0xD0000000)
19 #define VA_SPEAR_ICM1_2_BASE IOMEM(0xFD000000)
20 #define SPEAR_ICM1_UART_BASE UL(0xD0000000)
22 #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000)
25 #define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000)
26 #define VA_SPEAR6XX_ML_CPU_BASE IOMEM(0xF0000000)
29 #define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000)
30 #define VA_SPEAR_ICM3_SMI_CTRL_BASE IOMEM(0xFC000000)
31 #define SPEAR_ICM3_DMA_BASE UL(0xFC400000)
32 #define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000)
[all …]
/linux/Documentation/devicetree/bindings/spi/
H A Dspi-pl022.yaml47 runtime power management system suspends the device. A setting of 0
88 reg = <0xe0100000 0x1000>;
90 #size-cells = <0>;
91 interrupts = <0 31 0x4>;
93 <&dma_controller 24 0>;
102 pl022,interface = <0>;
103 pl022,com-mode = <0x2>;
104 pl022,rx-level-trig = <0>;
105 pl022,tx-level-trig = <0>;
106 pl022,ctrl-len = <0x11>;
[all …]
/linux/arch/powerpc/boot/dts/
H A Dmpc832x_rdb.dts26 #size-cells = <0>;
28 PowerPC,8323@0 {
30 reg = <0x0>;
31 d-cache-line-size = <0x20>; // 32 bytes
32 i-cache-line-size = <0x20>; // 32 bytes
35 timebase-frequency = <0>;
36 bus-frequency = <0>;
37 clock-frequency = <0>;
43 reg = <0x00000000 0x04000000>;
51 ranges = <0x0 0xe0000000 0x00100000>;
[all …]
H A Dac14xx.dts25 PowerPC,5121@0 {
33 reg = <0x00000000 0x10000000>; /* 256MB at 0 */
41 ranges = <0x0 0x0 0xfc000000 0x04000000 /* CS0: NOR flash */
42 0x1 0x0 0xe0000000 0x00010000 /* CS1: FRAM */
43 0x2 0x0 0xe0100000 0x00080000 /* CS2: asi1 */
44 0x3 0x0 0xe0300000 0x00020000 /* CS3: comm */
45 0x5 0x0 0xe0400000 0x00010000 /* CS5: safety */
46 0x6 0x0 0xe0200000 0x00080000>; /* CS6: asi2 */
48 flash@0,0 {
50 reg = <0 0x00000000 0x04000000>;
[all …]
H A Dsequoia.dts22 dcr-parent = <&{/cpus/cpu@0}>;
35 #size-cells = <0>;
37 cpu@0 {
40 reg = <0x00000000>;
41 clock-frequency = <0>; /* Filled in by zImage */
42 timebase-frequency = <0>; /* Filled in by zImage */
54 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
60 cell-index = <0>;
61 dcr-reg = <0x0c0 0x009>;
62 #address-cells = <0>;
[all …]
/linux/arch/arm/boot/dts/st/
H A Dspear13xx.dtsi15 #size-cells = <0>;
17 cpu@0 {
20 reg = <0>;
36 reg = < 0xec801000 0x1000 >,
37 < 0xec800100 0x0100 >;
42 interrupts = <0 6 0x04>,
43 <0 7 0x04>;
48 reg = <0xed000000 0x1000>;
56 reg = <0 0x40000000>;
79 ranges = <0x50000000 0x50000000 0x10000000
[all …]
/linux/Documentation/devicetree/bindings/mmc/
H A Darasan,sdhci.yaml137 enum: [0, 1]
158 enum: [0, 1, 2]
159 default: 0
185 reg = <0xe0100000 0x1000>;
189 interrupts = <0 24 4>;
195 reg = <0xe2800000 0x1000>;
199 interrupts = <0 24 4>;
210 reg = <0xfe330000 0x10000>;
220 #clock-cells = <0>;
227 interrupts = <0 48 4>;
[all …]
/linux/arch/arm/boot/dts/xilinx/
H A Dzynq-7000.dtsi13 #size-cells = <0>;
15 cpu0: cpu@0 {
18 reg = <0>;
47 interrupts = <0 5 4>, <0 6 4>;
49 reg = <0xf8891000 0x1000>,
50 <0xf8893000 0x1000>;
69 #size-cells = <0>;
72 port@0 {
73 reg = <0>;
104 reg = <0xf8007100 0x20>;
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Ds5pv210.dtsi46 #size-cells = <0>;
48 cpu@0 {
51 reg = <0>;
55 xxti: oscillator-0 {
57 clock-frequency = <0>;
59 #clock-cells = <0>;
64 clock-frequency = <0>;
66 #clock-cells = <0>;
77 reg = <0xb0600000 0x2000>,
78 <0xb0000000 0x20000>,
[all …]