/freebsd/sys/contrib/device-tree/src/arm/nxp/mxs/ |
H A D | imx28-apf28.dts | 15 reg = <0x40000000 0x08000000>; 21 pinctrl-0 = <&duart_pins_a>; 27 pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>; 30 partition@0 { 32 reg = <0x0 0x300000>; 37 reg = <0x300000 0x80000>; 42 reg = <0x380000 0x80000>; 47 reg = <0x400000 0x80000>; 52 reg = <0x480000 0x80000>; 57 reg = <0x500000 0x800000>; [all …]
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/freebsd/lib/msun/ld128/ |
H A D | s_logl.c | 55 * rest of p(d). In the worst case when k = 0 and log(X_i) is 0, the final 70 * in beginning with the Taylor coefficients 0 + 1*d, which tends to happen 98 P3 = 3.33333333333333333333333333333233795e-1L, /* 0x15555555555555555555555554d42.0p-114L */ 99 P4 = -2.49999999999999999999999999941139296e-1L, /* -0x1ffffffffffffffffffffffdab14e.0p-115L */ 100 P5 = 2.00000000000000000000000085468039943e-1L, /* 0x19999999999999999999a6d3567f4.0p-115L */ 101 P6 = -1.66666666666666666666696142372698408e-1L, /* -0x15555555555555555567267a58e1 [all...] |
/freebsd/lib/msun/ld80/ |
H A D | s_logl.c | 55 * rest of p(d). In the worst case when k = 0 and log(X_i) is 0, the final 70 * in beginning with the Taylor coefficients 0 + 1*d, which tends to happen 103 P3 = 3.3333333333333359e-1, /* 0x1555555555555a.0p-54 */ 104 P4 = -2.5000000000004424e-1, /* -0x1000000000031d.0p-54 */ 105 P5 = 1.9999999992970016e-1, /* 0x1999999972f3c7.0p-55 */ 106 P6 = -1.6666666072191585e-1, /* -0x15555548912c0 [all...] |
/freebsd/sys/contrib/dev/iwlwifi/ |
H A D | iwl-io.h | 23 iwl_trans_set_bits_mask(trans, reg, mask, 0); in iwl_clear_bit() 44 iwl_write_prph_delay(trans, ofs, val, 0); in iwl_write_prph() 61 * UMAC periphery address space changed from 0xA00000 to 0xD00000 starting from
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/freebsd/sys/contrib/device-tree/src/arm64/xilinx/ |
H A D | zynqmp-sm-k26-revA.dts | 50 memory@0 { 52 reg = <0x0 0x0 0x0 0x80000000>, <0x8 0x00000000 0x0 0x80000000>; 61 reg = <0x0 0x7ff00000 0x0 0x100000>; 95 io-channels = <&xilinx_ams 0>, <&xilinx_ams 1>, <&xilinx_ams 2>, 110 pwms = <&ttc0 2 40000 0>; 144 &qspi { /* MIO 0-5 - U143 */ 146 spi_flash: flash@0 { /* MT25QU512A */ 148 reg = <0>; 158 partition@0 { 160 reg = <0x0 0x80000>; /* 512KB */ [all …]
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | qcom,sm6115-tlmm.yaml | 59 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$" 101 reg = <0x500000 0x400000>, 102 <0x900000 0x400000>, 103 <0xd00000 [all...] |
H A D | qcom,sm6115-pinctrl.yaml | 80 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$" 128 pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$" 156 reg = <0x500000 0x400000>, 157 <0x900000 0x400000>, 158 <0xd00000 0x400000>; 165 gpio-ranges = <&tlmm 0 0 114>;
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/freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
H A D | armada-8040-db.dts | 20 memory@0 { 22 reg = <0x0 0x0 0x0 0x80000000>; 34 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus { 40 gpio = <&expander0 0 GPIO_ACTIVE_HIGH>; 52 cp0_usb3_0_phy: cp0-usb3-0-phy { 57 cp1_reg_usb3_0_vbus: cp1-usb3-0-vbus { 63 gpio = <&expander1 0 GPIO_ACTIVE_HIGH>; 66 cp1_usb3_0_phy: cp1-usb3-0-phy { 75 flash@0 { 77 reg = <0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/marvell/ |
H A D | armada-xp-linksys-mamba.dts | 6 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk 34 memory@0 { 36 reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */ 40 ranges = <MBUS_ID(0xf0, 0x01) 0 0 [all...] |
/freebsd/sys/contrib/device-tree/Bindings/iommu/ |
H A D | arm,smmu.yaml | 23 pattern: "^iommu@[0-9a-f]*" 168 minimum: 0 598 reg = <0xba5e0000 0x10000>; 600 interrupts = <0 32 4>, 601 <0 33 4>, 602 <0 34 4>, /* This is the first context interrupt */ 603 <0 35 4>, 604 <0 36 4>, 605 <0 37 4>; 609 /* device with two stream IDs, 0 and 7 */ [all …]
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/freebsd/sys/dev/ti/ |
H A D | if_tireg.h | 45 #define TI_PCI_ID 0x000 /* PCI device/vendor ID */ 46 #define TI_PCI_CMDSTAT 0x004 47 #define TI_PCI_CLASSCODE 0x008 48 #define TI_PCI_BIST 0x00C 49 #define TI_PCI_LOMEM 0x010 /* Shared memory base address */ 50 #define TI_PCI_SUBSYS 0x02C 51 #define TI_PCI_ROMBASE 0x030 52 #define TI_PCI_INT 0x03C 55 #define PCIM_CMD_MWIEN 0x0010 61 #define ALT_VENDORID 0x12AE [all …]
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/freebsd/sys/dev/qlnx/qlnxe/ |
H A D | ecore_hsi_debug_tools.h | 37 GRCBASE_GRC = 0x50000, 38 GRCBASE_MISCS = 0x9000, 39 GRCBASE_MISC = 0x8000, 40 GRCBASE_DBU = 0xa000, 41 GRCBASE_PGLUE_B = 0x2a8000, 42 GRCBASE_CNIG = 0x218000, 43 GRCBASE_CPMU = 0x30000, 44 GRCBASE_NCSI = 0x40000, 45 GRCBASE_OPTE = 0x53000, 46 GRCBASE_BMB = 0x540000, [all …]
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H A D | ecore_init_values.h | 35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */ 36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */ 37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */ 38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */ 40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */ 41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */ 42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */ 43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */ 44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */ 45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */ [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | msm8996.dtsi | 29 #clock-cells = <0>; 36 #clock-cells = <0>; 44 #size-cells = <0>; 46 CPU0: cpu@0 { 49 reg = <0x0 0x0>; 53 clocks = <&kryocc 0>; 68 reg = <0x0 0x1>; 72 clocks = <&kryocc 0>; 82 reg = <0x0 0x100>; 101 reg = <0x0 0x101>; [all …]
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H A D | msm8998.dtsi | 16 qcom,msm-id = <292 0x0>; 26 reg = <0x0 0x80000000 0x0 0x0>; 35 reg = <0x0 0x85800000 0x0 0x600000>; 40 reg = <0x0 0x85e00000 0x0 0x100000>; 45 reg = <0x0 0x86000000 0x0 0x200000>; 50 reg = <0x0 0x86200000 0x0 0x2d00000>; 56 reg = <0x0 0x88f00000 0x0 0x200000>; 64 reg = <0x0 0x8ab00000 0x0 0x700000>; 69 reg = <0x0 0x8b200000 0x0 0x1a00000>; 74 reg = <0x0 0x8cc00000 0x0 0x7000000>; [all …]
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H A D | sdm845.dtsi | 78 #clock-cells = <0>; 85 #clock-cells = <0>; 92 #size-cells = <0>; 94 CPU0: cpu@0 { 97 reg = <0x0 0x0>; 98 clocks = <&cpufreq_hw 0>; 102 qcom,freq-domain = <&cpufreq_hw 0>; 126 reg = <0x0 0x100>; 127 clocks = <&cpufreq_hw 0>; 131 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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