Searched +full:0 +full:xc0010000 (Results 1 – 13 of 13) sorted by relevance
/linux/Documentation/devicetree/bindings/pci/ |
H A D | amazon,al-alpine-v3-pcie.yaml | 57 reg = <0x0 0xfb600000 0x0 0x00100000 58 0x0 0xfd800000 0x0 0x00010000 59 0x0 0xfd810000 0x0 0x00001000>; 61 bus-range = <0 255>; 67 interrupt-map-mask = <0x00 0 0 7>; 68 interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; /* INTa */ 69 ranges = <0x02000000 0x0 0xc0010000 0x0 0xc0010000 0x0 0x07ff0000>;
|
/linux/arch/powerpc/boot/dts/fsl/ |
H A D | bsc9132qds.dts | 20 ranges = <0x0 0x0 0x0 0x88000000 0x08000000 21 0x1 0x0 0x0 0xff800000 0x00010000>; 22 reg = <0x0 0xff71e000 0x0 0x2000>; 26 ranges = <0x0 0x0 0xff700000 0x100000>; 30 reg = <0 0xff70a000 0 0x1000>; 31 ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x20000000 32 0x1000000 0x0 0x00000000 0 0xc0010000 0x0 0x10000>; 33 pcie@0 { 34 ranges = <0x2000000 0x0 0x90000000 35 0x2000000 0x0 0x90000000 [all …]
|
/linux/arch/m68k/fpsp040/ |
H A D | stan.S | 27 | k = N mod 2, so in particular, k = 0 or 1. 62 BOUNDS1: .long 0x3FD78000,0x4004BC7E 63 TWOBYPI: .long 0x3FE45F30,0x6DC9C883 65 TANQ4: .long 0x3EA0B759,0xF50F8688 66 TANP3: .long 0xBEF2BAA5,0xA8924F04 68 TANQ3: .long 0xBF346F59,0xB39BA65F,0x00000000,0x00000000 70 TANP2: .long 0x3FF60000,0xE073D3FC,0x199C4A00,0x00000000 72 TANQ2: .long 0x3FF90000,0xD23CD684,0x15D95FA1,0x00000000 74 TANP1: .long 0xBFFC0000,0x8895A6C5,0xFB423BCA,0x00000000 76 TANQ1: .long 0xBFFD0000,0xEEF57E0D,0xA84BC8CE,0x00000000 [all …]
|
/linux/arch/arm64/boot/dts/marvell/mmp/ |
H A D | pxa1908.dtsi | 16 #size-cells = <0>; 18 cpu0: cpu@0 { 21 reg = <0 0>; 28 reg = <0 1>; 35 reg = <0 2>; 42 reg = <0 3>; 77 reg = <0 0xc0010000 0 0x10000>; 87 reg = <0 0xd1df9000 0 0x1000>, 88 <0 0xd1dfa000 0 0x2000>, 90 <0 0xd1dfc000 0 0x2000>, [all …]
|
/linux/arch/arm/boot/dts/samsung/ |
H A D | s5pv210.dtsi | 46 #size-cells = <0>; 48 cpu@0 { 51 reg = <0>; 55 xxti: oscillator-0 { 57 clock-frequency = <0>; 59 #clock-cells = <0>; 64 clock-frequency = <0>; 66 #clock-cells = <0>; 77 reg = <0xb0600000 0x2000>, 78 <0xb0000000 0x20000>, [all …]
|
/linux/arch/m68k/ifpsp060/src/ |
H A D | ftest.S | 44 short 0x0000 47 short 0x0000 50 short 0x0000 67 align 0x4 74 addq.l &0x4,%sp 79 addq.l &0x4,%sp 83 addq.l &0x4,%sp 90 movm.l &0x3f3c,-(%sp) 91 fmovm.x &0xff,-(%sp) 95 addq.l &0x4,%sp [all …]
|
H A D | fplsp.S | 37 short 0x0000 39 short 0x0000 41 short 0x0000 44 short 0x0000 46 short 0x0000 48 short 0x0000 51 short 0x0000 53 short 0x0000 55 short 0x0000 58 short 0x0000 [all …]
|
H A D | fpsp.S | 43 set _off_bsun, 0x00 44 set _off_snan, 0x04 45 set _off_operr, 0x08 46 set _off_ovfl, 0x0c 47 set _off_unfl, 0x10 48 set _off_dz, 0x14 49 set _off_inex, 0x18 50 set _off_fline, 0x1c 51 set _off_fpu_dis, 0x20 52 set _off_trap, 0x24 [all …]
|
/linux/arch/s390/net/ |
H A D | bpf_jit_comp.c | 59 #define SEEN_MEM BIT(0) /* use mem[] for temporary storage */ 64 #define NVREGS 0xffc0 /* %r6-%r15 */ 69 #define REG_W0 (MAX_BPF_JIT_REG + 0) /* Work register 1 (even) */ 73 #define REG_0 REG_W0 /* Register 0 */ 104 [REG_W0] = 0, 137 return 0; in ptr_to_pcrel() 187 unsigned int __disp = (disp) & 0xfff; \ 201 unsigned int __imm = (imm) & 0xffff; \ 208 long __pcrel = ((pcrel) >> 1) & 0xffff; \ 215 _EMIT4((op) | (mask) << 20 | (__rel & 0xffff)); \ [all …]
|
/linux/arch/x86/kvm/svm/ |
H A D | svm.h | 116 #define SEV_POLICY_NODBG BIT_ULL(0) 401 vmcb->control.clean = 0; in vmcb_mark_all_dirty() 566 (msr < (APIC_BASE_MSR + 0x100)); in is_x2apic_msrpm_offset() 622 * read (bit 0) and write (bit 1), where a bit value of '1' means intercepted. 636 case 0: in svm_msrpm_bit_nr() 637 range_nr = 0; in svm_msrpm_bit_nr() 639 case 0xc0000000: in svm_msrpm_bit_nr() 642 case 0xc0010000: in svm_msrpm_bit_nr() 660 if (bit_nr < 0) \ 667 __BUILD_SVM_MSR_BITMAP_HELPER(ret_type, action, bitop, read, 0) \ [all …]
|
/linux/arch/x86/include/asm/ |
H A D | msr-index.h | 10 #define MSR_EFER 0xc0000080 /* extended feature register */ 11 #define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target */ 12 #define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target */ 13 #define MSR_CSTAR 0xc0000083 /* compat mode SYSCALL target */ 14 #define MSR_SYSCALL_MASK 0xc0000084 /* EFLAGS mask for syscall */ 15 #define MSR_FS_BASE 0xc0000100 /* 64bit FS base */ 16 #define MSR_GS_BASE 0xc0000101 /* 64bit GS base */ 17 #define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */ 18 #define MSR_TSC_AUX 0xc0000103 /* Auxiliary TSC */ 21 #define _EFER_SCE 0 /* SYSCALL/SYSRET */ [all …]
|
/linux/tools/arch/x86/include/asm/ |
H A D | msr-index.h | 10 #define MSR_EFER 0xc0000080 /* extended feature register */ 11 #define MSR_STAR 0xc0000081 /* legacy mode SYSCALL target */ 12 #define MSR_LSTAR 0xc0000082 /* long mode SYSCALL target */ 13 #define MSR_CSTAR 0xc0000083 /* compat mode SYSCALL target */ 14 #define MSR_SYSCALL_MASK 0xc0000084 /* EFLAGS mask for syscall */ 15 #define MSR_FS_BASE 0xc0000100 /* 64bit FS base */ 16 #define MSR_GS_BASE 0xc0000101 /* 64bit GS base */ 17 #define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */ 18 #define MSR_TSC_AUX 0xc0000103 /* Auxiliary TSC */ 21 #define _EFER_SCE 0 /* SYSCALL/SYSRET */ [all …]
|
/linux/arch/m68k/ifpsp060/ |
H A D | fpsp.sa | 1 .long 0x60ff0000,0x17400000,0x60ff0000,0x15f40000 2 .long 0x60ff0000,0x02b60000,0x60ff0000,0x04700000 3 .long 0x60ff0000,0x1b100000,0x60ff0000,0x19aa0000 4 .long 0x60ff0000,0x1b5a0000,0x60ff0000,0x062e0000 5 .long 0x60ff0000,0x102c0000,0x51fc51fc,0x51fc51fc 6 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc 7 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc 8 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc 9 .long 0x2f00203a,0xff2c487b,0x0930ffff,0xfef8202f 10 .long 0x00044e74,0x00042f00,0x203afef2,0x487b0930 [all …]
|