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/linux/Documentation/devicetree/bindings/soc/fsl/
H A Dfsl,bman.yaml34 registers which are located at offsets 0xbf8 and 0xbfc
78 reg = <0x31a000 0x1000>;
80 fsl,liodn = <0x17>;
H A Dfsl,qman.yaml35 registers which are located at offsets 0xbf8 and 0xbfc
87 reg = <0x318000 0x1000>;
89 fsl,liodn = <0x16>;
/linux/drivers/thermal/
H A Dqoriq_thermal.c19 #define TMR_DISABLE 0x0
20 #define TMR_ME 0x80000000
21 #define TMR_ALPF 0x0c000000
22 #define TMR_ALPF_V2 0x03000000
23 #define TMTMIR_DEFAULT 0x0000000f
24 #define TIER_DISABLE 0x0
25 #define TEUMR0_V2 0x51009c00
26 #define TMSARA_V2 0xe
27 #define TMU_VER1 0x1
28 #define TMU_VER2 0x2
[all …]
/linux/arch/powerpc/sysdev/
H A Dfsl_pci.h16 #define PCI_FSL_BRR1 0xbf8
17 #define PCI_FSL_BRR1_VER 0xffff
19 #define PCIE_LTSSM 0x0404 /* PCIE Link Training and Status */
20 #define PCIE_LTSSM_L0 0x16 /* L0 state */
21 #define PCIE_FSL_CSR_CLASSCODE 0x474 /* FSL GPEX CSR */
22 #define PCIE_IP_REV_2_2 0x02080202 /* PCIE IP block version Rev2.2 */
23 #define PCIE_IP_REV_3_0 0x02080300 /* PCIE IP block version Rev3.0 */
24 #define PIWAR_EN 0x80000000 /* Enable */
25 #define PIWAR_PF 0x20000000 /* prefetch */
26 #define PIWAR_TGI_LOCAL 0x00f00000 /* target - local memory */
[all …]
/linux/drivers/input/keyboard/
H A Dsnvs_pwrkey.c23 #define SNVS_HPVIDR1_REG 0xBF8
24 #define SNVS_LPSR_REG 0x4C /* LP Status Register */
25 #define SNVS_LPCR_REG 0x38 /* LP Control Register */
26 #define SNVS_HPSR_REG 0x14
52 state = state & SNVS_HPSR_BTN ? 1 : 0; in imx_imx_snvs_check_for_events()
76 pm_wakeup_event(input->dev.parent, 0); in imx_snvs_pwrkey_interrupt()
80 if (pdata->minor_rev == 0) { in imx_snvs_pwrkey_interrupt()
88 input_report_key(input, pdata->keycode, 0); in imx_snvs_pwrkey_interrupt()
147 pdata->irq = platform_get_irq(pdev, 0); in imx_snvs_pwrkey_probe()
148 if (pdata->irq < 0) in imx_snvs_pwrkey_probe()
[all …]
/linux/drivers/memory/
H A Dfsl-corenet-cf.c29 .err_reg_offs = 0xa00,
35 .err_reg_offs = 0xe40,
43 #define CCF_BRR 0xbf8
44 #define CCF_BRR_IPID 0xffff0000
45 #define CCF_BRR_IPID_T1040 0x09310000
61 u32 errdet; /* 0x00 Error Detect Register */
62 /* 0x04 Error Enable (ccf1)/Disable (ccf2) Register */
64 /* 0x08 Error Interrupt Enable Register (ccf2 only) */
66 u32 cecar; /* 0x0c Error Capture Attribute Register */
67 u32 cecaddrh; /* 0x10 Error Capture Address High */
[all …]
/linux/arch/m68k/include/asm/
H A Dm54xxpci.h21 #define PCIIDR (CONFIG_MBAR + 0xb00) /* PCI device/vendor ID */
22 #define PCISCR (CONFIG_MBAR + 0xb04) /* PCI status/command */
23 #define PCICCRIR (CONFIG_MBAR + 0xb08) /* PCI class/revision */
24 #define PCICR1 (CONFIG_MBAR + 0xb0c) /* PCI configuration 1 */
25 #define PCIBAR0 (CONFIG_MBAR + 0xb10) /* PCI base address 0 */
26 #define PCIBAR1 (CONFIG_MBAR + 0xb14) /* PCI base address 1 */
27 #define PCICCPR (CONFIG_MBAR + 0xb28) /* PCI cardbus CIS pointer */
28 #define PCISID (CONFIG_MBAR + 0xb2c) /* PCI subsystem IDs */
29 #define PCIERBAR (CONFIG_MBAR + 0xb30) /* PCI expansion ROM */
30 #define PCICPR (CONFIG_MBAR + 0xb34) /* PCI capabilities pointer */
[all …]
/linux/drivers/clk/qcom/
H A Dvideocc-sm8250.c30 { 249600000, 2000000000, 0 },
34 .l = 0x25,
35 .alpha = 0x8000,
36 .config_ctl_val = 0x20485699,
37 .config_ctl_hi_val = 0x00002261,
38 .config_ctl_hi1_val = 0x329A699C,
39 .user_ctl_val = 0x00000000,
40 .user_ctl_hi_val = 0x00000805,
41 .user_ctl_hi1_val = 0x00000000,
45 .offset = 0x42c,
[all …]
H A Dvideocc-sm8350.c41 { 249600000, 1750000000, 0 },
45 { 249600000, 1800000000, 0 },
49 .l = 0x25,
50 .alpha = 0x8000,
51 .config_ctl_val = 0x20485699,
52 .config_ctl_hi_val = 0x00002261,
53 .config_ctl_hi1_val = 0x2a9a699c,
54 .test_ctl_val = 0x00000000,
55 .test_ctl_hi_val = 0x00000000,
56 .test_ctl_hi1_val = 0x01800000,
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_d.h27 #define mmIH_VMID_0_LUT 0xe00
28 #define mmIH_VMID_1_LUT 0xe01
29 #define mmIH_VMID_2_LUT 0xe02
30 #define mmIH_VMID_3_LUT 0xe03
31 #define mmIH_VMID_4_LUT 0xe04
32 #define mmIH_VMID_5_LUT 0xe05
33 #define mmIH_VMID_6_LUT 0xe06
34 #define mmIH_VMID_7_LUT 0xe07
35 #define mmIH_VMID_8_LUT 0xe08
36 #define mmIH_VMID_9_LUT 0xe09
[all …]
H A Doss_3_0_1_d.h27 #define mmIH_VMID_0_LUT 0xe00
28 #define mmIH_VMID_1_LUT 0xe01
29 #define mmIH_VMID_2_LUT 0xe02
30 #define mmIH_VMID_3_LUT 0xe03
31 #define mmIH_VMID_4_LUT 0xe04
32 #define mmIH_VMID_5_LUT 0xe05
33 #define mmIH_VMID_6_LUT 0xe06
34 #define mmIH_VMID_7_LUT 0xe07
35 #define mmIH_VMID_8_LUT 0xe08
36 #define mmIH_VMID_9_LUT 0xe09
[all …]
H A Doss_2_0_d.h27 #define mmIH_VMID_0_LUT 0xf50
28 #define mmIH_VMID_1_LUT 0xf51
29 #define mmIH_VMID_2_LUT 0xf52
30 #define mmIH_VMID_3_LUT 0xf53
31 #define mmIH_VMID_4_LUT 0xf54
32 #define mmIH_VMID_5_LUT 0xf55
33 #define mmIH_VMID_6_LUT 0xf56
34 #define mmIH_VMID_7_LUT 0xf57
35 #define mmIH_VMID_8_LUT 0xf58
36 #define mmIH_VMID_9_LUT 0xf59
[all …]
H A Doss_3_0_d.h27 #define mmIH_VMID_0_LUT 0xe00
28 #define mmIH_VMID_1_LUT 0xe01
29 #define mmIH_VMID_2_LUT 0xe02
30 #define mmIH_VMID_3_LUT 0xe03
31 #define mmIH_VMID_4_LUT 0xe04
32 #define mmIH_VMID_5_LUT 0xe05
33 #define mmIH_VMID_6_LUT 0xe06
34 #define mmIH_VMID_7_LUT 0xe07
35 #define mmIH_VMID_8_LUT 0xe08
36 #define mmIH_VMID_9_LUT 0xe09
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Dreg.h7 #define TXPKT_BUF_SELECT 0x69
8 #define RXPKT_BUF_SELECT 0xA5
9 #define DISABLE_TRXPKT_BUF_ACCESS 0x0
11 #define REG_SYS_ISO_CTRL 0x0000
12 #define REG_SYS_FUNC_EN 0x0002
13 #define REG_APS_FSMCO 0x0004
14 #define REG_SYS_CLKR 0x0008
15 #define REG_9346CR 0x000A
16 #define REG_EE_VPD 0x000C
17 #define REG_AFE_MISC 0x0010
[all …]
/linux/drivers/net/ethernet/realtek/
H A Dr8169_phy_config.c23 int oldpage = phy_select_page(phydev, 0x0007); in r8168d_modify_extpage()
25 __phy_write(phydev, 0x1e, extpage); in r8168d_modify_extpage()
28 phy_restore_page(phydev, oldpage, 0); in r8168d_modify_extpage()
34 int oldpage = phy_select_page(phydev, 0x0005); in r8168d_phy_param()
36 __phy_write(phydev, 0x05, parm); in r8168d_phy_param()
37 __phy_modify(phydev, 0x06, mask, val); in r8168d_phy_param()
39 phy_restore_page(phydev, oldpage, 0); in r8168d_phy_param()
45 int oldpage = phy_select_page(phydev, 0x0a43); in r8168g_phy_param()
47 __phy_write(phydev, 0x13, parm); in r8168g_phy_param()
48 __phy_modify(phydev, 0x14, mask, val); in r8168g_phy_param()
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/
H A Dreg.h7 #define TXPKT_BUF_SELECT 0x69
8 #define RXPKT_BUF_SELECT 0xA5
9 #define DISABLE_TRXPKT_BUF_ACCESS 0x0
11 #define REG_SYS_ISO_CTRL 0x0000
12 #define REG_SYS_FUNC_EN 0x0002
13 #define REG_APS_FSMCO 0x0004
14 #define REG_SYS_CLKR 0x0008
15 #define REG_9346CR 0x000A
16 #define REG_EE_VPD 0x000C
17 #define REG_SYS_SWR_CTRL1 0x0010
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
H A Dreg.h7 #define TXPKT_BUF_SELECT 0x69
8 #define RXPKT_BUF_SELECT 0xA5
9 #define DISABLE_TRXPKT_BUF_ACCESS 0x0
11 #define REG_SYS_ISO_CTRL 0x0000
12 #define REG_SYS_FUNC_EN 0x0002
13 #define REG_APS_FSMCO 0x0004
14 #define REG_SYS_CLKR 0x0008
15 #define REG_9346CR 0x000A
16 #define REG_EE_VPD 0x000C
17 #define REG_AFE_MISC 0x0010
[all …]
/linux/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
H A Dreg.h7 #define TXPKT_BUF_SELECT 0x69
8 #define RXPKT_BUF_SELECT 0xA5
9 #define DISABLE_TRXPKT_BUF_ACCESS 0x0
11 #define REG_SYS_ISO_CTRL 0x0000
12 #define REG_SYS_FUNC_EN 0x0002
13 #define REG_APS_FSMCO 0x0004
14 #define REG_SYS_CLKR 0x0008
15 #define REG_9346CR 0x000A
16 #define REG_EE_VPD 0x000C
17 #define REG_AFE_MISC 0x0010
[all …]
/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw8822c_table.c16 0x83000000, 0x00000000, 0x40000000, 0x00000000,
17 0x1D90, 0x300001FF,
18 0x1D90, 0x300101FE,
19 0x1D90, 0x300201FD,
20 0x1D90, 0x300301FC,
21 0x1D90, 0x300401FB,
22 0x1D90, 0x300501FA,
23 0x1D90, 0x300601F9,
24 0x1D90, 0x300701F8,
25 0x1D90, 0x300801F7,
[all …]