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/freebsd/sys/contrib/device-tree/Bindings/display/msm/
H A Ddpu.txt66 Port 0 -> DPU_INTF1 (DSI1)
78 reg = <0xae00000 0x1000>;
81 power-domains = <&clock_dispcc 0>;
99 iommus = <&apps_iommu 0>;
103 ranges = <0 0 0xae00000 0xb2008>;
107 reg = <0 0x1000 0x8f000>, <0 0xb0000 0x2008>;
118 assigned-clock-rates = <0 0 300000000 19200000>;
120 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
124 #size-cells = <0>;
126 port@0 {
[all …]
H A Ddpu-sc7180.yaml73 "^display-controller@[0-9a-f]+$":
130 port@0:
139 - port@0
176 reg = <0xae00000 0x1000>;
191 iommus = <&apps_smmu 0x800 0x2>;
196 reg = <0x0ae01000 0x8f000>,
197 <0x0aeb0000 0x2008>;
211 interrupts = <0>;
217 #size-cells = <0>;
219 port@0 {
[all …]
H A Ddpu-sc7280.yaml72 "^display-controller@[0-9a-f]+$":
128 port@0:
137 - port@0
174 reg = <0xae00000 0x1000>;
191 iommus = <&apps_smmu 0x900 0x402>;
196 reg = <0x0ae01000 0x8f000>,
197 <0x0aeb0000 0x2008>;
215 interrupts = <0>;
221 #size-cells = <0>;
223 port@0 {
[all …]
H A Dqcom,sc7180-mdss.yaml49 "^display-controller@[0-9a-f]+$":
57 "^displayport-controller@[0-9a-f]+$":
65 "^dsi@[0-9a-f]+$":
75 "^phy@[0-9a-f]+$":
101 reg = <0xae00000 0x1000>;
118 iommus = <&apps_smmu 0x800 0x2>;
123 reg = <0x0ae0100
[all...]
H A Dqcom,sc7280-mdss.yaml49 "^display-controller@[0-9a-f]+$":
57 "^displayport-controller@[0-9a-f]+$":
65 "^dsi@[0-9a-f]+$":
75 "^edp@[0-9a-f]+$":
83 "^phy@[0-9a-f]+$":
111 reg = <0xae00000 0x1000>;
130 iommus = <&apps_smmu 0x900 0x40
[all...]
/freebsd/sys/contrib/device-tree/src/mips/lantiq/
H A Ddanube.dtsi8 cpu@0 {
17 reg = <0x1f800000 0x800000>;
18 ranges = <0x0 0x1f800000 0x7fffff>;
24 reg = <0x80200 0x120>;
29 reg = <0x803f0 0x10>;
37 reg = <0x1f000000 0x800000>;
38 ranges = <0x0 0x1f000000 0x7fffff>;
44 reg = <0x101000 0x1000>;
49 reg = <0x102000 0x1000>;
54 reg = <0x103000 0x1000>;
[all …]