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/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3798cv200.dtsi27 #size-cells = <0>;
29 cpu@0 {
32 reg = <0x0 0x0>;
34 d-cache-size = <0x8000>; /* 32 KiB */
37 i-cache-size = <0x8000>; /* 32 KiB */
46 reg = <0x0 0x1>;
48 d-cache-size = <0x8000>; /* 32 KiB */
51 i-cache-size = <0x8000>; /* 32 KiB */
60 reg = <0x0 0x2>;
62 d-cache-size = <0x8000>; /* 32 KiB */
[all …]