Searched +full:0 +full:x942f8000 (Results 1 – 4 of 4) sorted by relevance
199 reg = <0x596e8000 0x88000>;207 mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>;214 reg = <0x92400000 0x1000000>;218 reg = <0x942f0000 0x8000>;222 reg = <0x942f8000 0x8000>;227 reg = <0x94300000 0x100000>;233 reg = <0x3b6e8000 0x88000>;242 mboxes = <&mu2 0 0>,243 <&mu2 1 0>,244 <&mu2 3 0>;
27 mboxes = <&lsio_mu5 0 134 fsl,entry-address = <0x34fe0000>;40 reg = <0x00000000 0x80000000 0 0x40000000>;55 pinctrl-0 = <&pinctrl_typec_mux>;69 mux-gpios = <&lsio_gpio5 0 GPIO_ACTIVE_HIGH>; /* needs to be an unused GPIO */72 #size-cells = <0>;74 i2c@0 {75 reg = <0>;77 #size-cells = <0>;81 reg = <0x1a>;[all …]
21 pwms = <&pwm2 0 100000 0>;22 brightness-levels = <0 100>;44 pinctrl-0 = <&pinctrl_gpio_led>;55 reg = <0x0 0x40000000 0 0xc0000000>,56 <0x1 0x00000000 0 0xc0000000>;73 #clock-cells = <0>;98 pinctrl-0 = <&pinctrl_audio_pwr_reg>;110 pinctrl-0 = <&pinctrl_flexcan1_reg>;121 pinctrl-0 = <&pinctrl_flexcan2_reg>;131 pinctrl-0 = <&pinctrl_pcie0_reg>;[all …]
32 reg = <0x00000000 0x80000000 0 0x40000000>;37 #clock-cells = <0>;48 reg = <0 0x90000000 0 0x8000>;53 reg = <0 0x90008000 0 0x8000>;58 reg = <0 0x90010000 0 0x8000>;63 reg = <0 0x90018000 0 0x8000>;68 reg = <0 0x900ff000 0 0x1000>;73 reg = <0 0x90100000 0 0x8000>;78 reg = <0 0x90108000 0 0x8000>;83 reg = <0 0x90110000 0 0x8000>;[all …]