/freebsd/contrib/llvm-project/lld/MachO/Arch/ |
H A D | ARM64Common.cpp | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 25 // TODO(gkm): extract embedded addend just so we can assert that it is 0 in getEmbeddedAddend() 26 return 0; in getEmbeddedAddend() 63 uint32_t base = ((r.length == 2) ? read32le(loc) : 0); in relocateOne() 103 if ((instruction & 0xbfc00000) != 0xb9400000) in relaxGotLoad() 105 assert(((instruction >> 10) & 0xfff) == 0 && in relaxGotLoad() 109 instruction = ((instruction & 0x001fffff) | 0x91000000); in relaxGotLoad() 122 write32le(loc, 0xD503201F); in handleDtraceReloc() 124 // change call site to 'MOVZ X0,0' in handleDtraceReloc() 125 write32le(loc, 0xD2800000); in handleDtraceReloc() [all …]
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H A D | ARM64.cpp | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 74 0x90000010, // 00: adrp x16, __la_symbol_ptr@page 75 0xf9400210, // 04: ldr x16, [x16, __la_symbol_ptr@pageoff] 76 0xd61f0200, // 08: br x16 85 0x90000011, // 00: adrp x17, _dyld_private@page 86 0x91000231, // 04: add x17, x17, _dyld_private@pageoff 87 0xa9bf47f0, // 08: stp x16/x17, [sp, #-16]! 88 0x90000010, // 0c: adrp x16, dyld_stub_binder@page 89 0xf9400210, // 10: ldr x16, [x16, dyld_stub_binder@pageoff] 90 0xd61f0200, // 14: br x16 [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
H A D | AArch64ExternalSymbolizer.cpp | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 72 memset(&SymbolicOp, '\0', sizeof(struct LLVMOpInfo1)); in tryAddingSymbolicOperand() 76 if (!GetOpInfo || !GetOpInfo(DisInfo, Address, /*Offset=*/0, OpSize, InstSize, in tryAddingSymbolicOperand() 85 SymbolicOp.Value = 0; in tryAddingSymbolicOperand() 99 uint32_t EncodedInst = 0x90000000; in tryAddingSymbolicOperand() 100 EncodedInst |= (Value & 0x3) << 29; // immlo in tryAddingSymbolicOperand() 101 EncodedInst |= ((Value >> 2) & 0x7FFFF) << 5; // immhi in tryAddingSymbolicOperand() 102 EncodedInst |= MCRI.getEncodingValue(MI.getOperand(0).getReg()); // reg in tryAddingSymbolicOperand() 105 CommentStream << format("0x%llx", (0xfffffffffffff000LL & Address) + in tryAddingSymbolicOperand() 106 Value * 0x1000); in tryAddingSymbolicOperand() [all …]
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/freebsd/contrib/llvm-project/lld/ELF/Arch/ |
H A D | AArch64.cpp | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 25 // as (Expr & ~0xFFF). (This applies even if the machine page size 28 return expr & ~static_cast<uint64_t>(0xFFF); in getAArch64Page() 73 // For instance, getBits(0xF0, 4, 8) returns 0xF. 95 defaultImageBase = 0x200000; in AArch64() 229 return 0; in getImplicitAddend() 315 return SignExtend64<28>(getBits(read32(buf), 0, 25) << 2); in getImplicitAddend() 320 return 0; in getImplicitAddend() 335 0xf0, 0x7b, 0xbf, 0xa9, // stp x16, x30, [sp,#-16]! in writePltHeader() 336 0x10, 0x00, 0x00, 0x90, // adrp x16, Page(&(.got.plt[2])) in writePltHeader() [all …]
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/freebsd/sys/contrib/openzfs/module/icp/asm-x86_64/aes/ |
H A D | aestab2.h | 49 0x00000001, 0x00000002, 0x00000004, 0x00000008, 50 0x00000010, 0x00000020, 0x00000040, 0x00000080, 51 0x0000001b, 0x00000036 57 0x00000063, 0x0000007c, 0x00000077, 0x0000007b, 58 0x000000f2, 0x0000006b, 0x0000006f, 0x000000c5, 59 0x00000030, 0x00000001, 0x00000067, 0x0000002b, 60 0x000000fe, 0x000000d7, 0x000000ab, 0x00000076, 61 0x000000ca, 0x00000082, 0x000000c9, 0x0000007d, 62 0x000000fa, 0x00000059, 0x00000047, 0x000000f0, 63 0x000000ad, 0x000000d4, 0x000000a2, 0x000000af, [all …]
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/freebsd/sys/contrib/device-tree/Bindings/cpu/ |
H A D | idle-states.yaml | 102 between 0 and infinite time, until a wake-up event occurs. 127 wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0) 167 0| 1 time(ms) 172 The graph curve with X-axis values = { x | 0 < x < 1ms } has a steep slope 444 #size-cells = <0>; 447 cpu@0 { 450 reg = <0x0 0x0>; 459 reg = <0x0 0x1>; 468 reg = <0x0 0x100>; 477 reg = <0x0 0x101>; [all …]
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/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM64/ |
H A D | EmulateInstructionARM64.cpp | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 29 #define GPR_OFFSET_NAME(reg) 0 31 #define FPU_OFFSET_NAME(reg) 0 32 #define EXC_OFFSET_NAME(reg) 0 33 #define DBG_OFFSET_NAME(reg) 0 34 #define DBG_OFFSET_NAME(reg) 0 36 "na", nullptr, 8, 0, lldb::eEncodingUint, lldb::eFormatHex, \ 61 #define No_VFP 0 77 static inline bool IsZero(uint64_t x) { return x == 0; } in IsZero() 85 if (shift == 0) in LSL() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonDepMask.h | 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 17 0xf0000000, 18 0xb0000000, 19 0x0fe03fe0, 20 0 }, 23 0xffc00000, 24 0x76000000, 25 0x00203fe0, 26 0 }, 29 0xff800000, [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | msm8996.dtsi | 29 #clock-cells = <0>; 36 #clock-cells = <0>; 44 #size-cells = <0>; 46 CPU0: cpu@0 { 49 reg = <0x0 0x0>; 53 clocks = <&kryocc 0>; 68 reg = <0x0 0x1>; 72 clocks = <&kryocc 0>; 82 reg = <0x0 0x100>; 101 reg = <0x0 0x101>; [all …]
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/freebsd/sys/dev/qlnx/qlnxe/ |
H A D | ecore_init_values.h | 35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */ 36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */ 37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */ 38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */ 40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */ 41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */ 42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */ 43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */ 44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */ 45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */ [all …]
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/freebsd/tools/test/iconv/ref/ |
H A D | UTF-32BE-rev | 1 0x00 = 0x00000000 2 0x01 = 0x01000000 3 0x02 = 0x02000000 4 0x03 = 0x03000000 5 0x04 = 0x04000000 6 0x05 = 0x05000000 7 0x06 = 0x06000000 8 0x07 = 0x07000000 9 0x08 = 0x08000000 10 0x09 = 0x09000000 [all …]
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