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/linux/arch/arm/boot/dts/aspeed/
H A Dopenbmc-flash-layout-128.dtsi8 u-boot@0 {
9 reg = <0x0 0xe0000>; // 896KB
14 reg = <0xe0000 0x20000>; // 128KB
19 reg = <0x100000 0x900000>; // 9MB
24 reg = <0xa00000 0x5600000>; // 86MB
29 reg = <0x6000000 0x2000000>; // 32MB
H A Dopenbmc-flash-layout-64.dtsi11 u-boot@0 {
12 reg = <0x0 0xe0000>; // 896KB
17 reg = <0xe0000 0x20000>; // 128KB
22 reg = <0x100000 0x900000>; // 9MB
27 reg = <0xa00000 0x2000000>; // 32MB
32 reg = <0x2a00000 0x1600000>; // 22MB
H A Dopenbmc-flash-layout-64-alt.dtsi11 u-boot@0 {
12 reg = <0x0 0xe0000>; // 896KB
17 reg = <0xe0000 0x20000>; // 128KB
22 reg = <0x100000 0x900000>; // 9MB
27 reg = <0xa00000 0x2000000>; // 32MB
32 reg = <0x2a00000 0x1600000>; // 22MB
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,gcc-mdm9607.yaml38 reg = <0x900000 0x4000>;
H A Dqcom,gcc-mdm9615.yaml44 reg = <0x900000 0x4000>;
H A Dqcom,gcc-msm8660.yaml49 reg = <0x900000 0x4000>;
/linux/arch/arm/include/uapi/asm/
H A Dunistd.h17 #define __NR_OABI_SYSCALL_BASE 0x900000
18 #define __NR_SYSCALL_MASK 0x0fffff
21 #define __NR_SYSCALL_BASE 0
33 #define __ARM_NR_BASE (__NR_SYSCALL_BASE+0x0f0000)
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dapm,xgene1-msi.yaml37 reg = <0x79000000 0x900000>;
38 interrupts = <0x0 0x10 0x4>,
39 <0x0 0x11 0x4>,
40 <0x0 0x12 0x4>,
41 <0x0 0x13 0x4>,
42 <0x0 0x14 0x4>,
43 <0x0 0x15 0x4>,
44 <0x0 0x16 0x4>,
45 <0x0 0x17 0x4>,
46 <0x0 0x18 0x4>,
[all …]
/linux/arch/arm/boot/dts/gemini/
H A Dgemini-ssi1328.dts17 memory@0 {
20 reg = <0x00000000 0x8000000>;
28 bootargs = "console=ttyS0,19200n8 initrd=0x900000,9M";
37 #size-cells = <0>;
54 ethernet-port@0 {
67 reg = <0x30000000 0x03200000>;
70 pinctrl-0 = <&pflash_default_pins>;
75 /* Eraseblock at 0xfe0000 */
76 fis-index-block = <0x7F>;
82 pinctrl-0 = <&gpio0_default_pins>;
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dti,phy-am654-serdes.yaml56 - description: Clock output names for SERDES 0
86 reg = <0x900000 0x2000>;
96 mux-controls = <&serdes_mux 0>;
/linux/arch/arm/boot/dts/marvell/
H A Darmada-385-linksys-caiman.dts18 wan_amber@0 {
20 reg = <0x0>;
25 reg = <0x1>;
30 reg = <0x2>;
35 reg = <0x3>;
40 reg = <0x5>;
45 reg = <0x6>;
50 reg = <0x7>;
55 reg = <0x8>;
60 reg = <0x9>;
[all …]
H A Darmada-385-linksys-cobra.dts18 wan_amber@0 {
20 reg = <0x0>;
25 reg = <0x1>;
30 reg = <0x2>;
35 reg = <0x3>;
40 reg = <0x5>;
45 reg = <0x6>;
50 reg = <0x7>;
55 reg = <0x8>;
60 reg = <0x9>;
[all …]
H A Darmada-385-linksys-shelby.dts18 wan_amber@0 {
20 reg = <0x0>;
25 reg = <0x1>;
30 reg = <0x2>;
35 reg = <0x3>;
40 reg = <0x5>;
45 reg = <0x6>;
50 reg = <0x7>;
55 reg = <0x8>;
60 reg = <0x9>;
[all …]
H A Darmada-xp-linksys-mamba.dts6 * remaps internal registers at 0xf1000000. Therefore, if earlyprintk
34 memory@0 {
36 reg = <0x00000000 0x00000000 0x00000000 0x10000000>; /* 256MB */
40 ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
41 MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
42 MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
43 MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000
44 MBUS_ID(0x0c, 0x04) 0 0 0xf1200000 0x100000>;
64 pinctrl-0 = <&ge0_rgmii_pins>;
69 bm,pool-long = <0>;
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dpm9g45.dts19 reg = <0x70000000 0x8000000>;
40 pinctrl_nand_rb: nand-rb-0 {
55 timer@0 {
57 reg = <0>, <1>;
67 pinctrl-0 = <
73 slot@0 {
74 reg = <0>;
91 pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb>;
95 reg = <0x3 0x0 0x800000>;
108 at91bootstrap@0 {
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm6115-tlmm.yaml59 - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-9]|11[0-2])$"
101 reg = <0x500000 0x400000>,
102 <0x900000 0x400000>,
103 <0xd00000 0x400000>;
110 gpio-ranges = <&tlmm 0 0 114>;
/linux/sound/drivers/vx/
H A Dvx_cmd.c19 [CMD_VERSION] = { 0x010000, 2, RMH_SSIZE_FIXED, 1 },
20 [CMD_SUPPORTED] = { 0x020000, 1, RMH_SSIZE_FIXED, 2 },
21 [CMD_TEST_IT] = { 0x040000, 1, RMH_SSIZE_FIXED, 1 },
22 [CMD_SEND_IRQA] = { 0x070001, 1, RMH_SSIZE_FIXED, 0 },
23 [CMD_IBL] = { 0x080000, 1, RMH_SSIZE_FIXED, 4 },
24 [CMD_ASYNC] = { 0x0A0000, 1, RMH_SSIZE_ARG, 0 },
25 [CMD_RES_PIPE] = { 0x400000, 1, RMH_SSIZE_FIXED, 0 },
26 [CMD_FREE_PIPE] = { 0x410000, 1, RMH_SSIZE_FIXED, 0 },
27 [CMD_CONF_PIPE] = { 0x42A101, 2, RMH_SSIZE_FIXED, 0 },
28 [CMD_ABORT_CONF_PIPE] = { 0x42A100, 2, RMH_SSIZE_FIXED, 0 },
[all …]
/linux/arch/arm64/boot/dts/amlogic/
H A Damlogic-c3-c308l-aw419.dts22 memory@0 {
24 reg = <0x0 0x0 0x0 0x80000000>;
35 reg = <0x0 0x07f00000 0x0 0x900000>;
158 #size-cells = <0>;
160 pinctrl-0 = <&nand_pins>;
163 nand@0 {
164 reg = <0>;
169 partition@0 {
171 reg = <0x0 0x00200000>;
175 reg = <0x00200000 0x00400000>;
[all …]
H A Damlogic-c3-c302x-aw409.dts22 memory@0 {
24 reg = <0x0 0x0 0x0 0x10000000>;
35 reg = <0x0 0x07f00000 0x0 0x900000>;
158 #size-cells = <0>;
160 pinctrl-0 = <&nand_pins>;
163 nand@0 {
164 reg = <0>;
169 partition@0 {
171 reg = <0x0 0x00200000>;
175 reg = <0x00200000 0x00400000>;
[all …]
/linux/drivers/net/wireless/ath/wil6210/
H A Dwmi.c21 int agg_wsize; /* = 0; */
24 " 0 - use default; < 0 - don't auto-establish");
29 " 60G device led enablement. Set the led ID (0-2) to enable");
62 * AHB addresses starting from 0x880000
75 * 0x880000 .. 0xa80000 2Mb BAR0
76 * 0x800000 .. 0x808000 0x900000 .. 0x908000 32k DCCM
77 * 0x840000 .. 0x860000 0x908000 .. 0x928000 128k PERIPH
81 {0x000000, 0x040000, 0x8c0000, "fw_code", true, true},
83 {0x800000, 0x808000, 0x900000, "fw_data", true, true},
85 {0x840000, 0x860000, 0x908000, "fw_peri", true, true},
[all …]
/linux/arch/arm64/boot/dts/broadcom/stingray/
H A Dstingray.dtsi43 #size-cells = <0>;
45 cpu@0 {
48 reg = <0x0 0x0>;
56 reg = <0x0 0x1>;
64 reg = <0x0 0x100>;
72 reg = <0x0 0x101>;
80 reg = <0x0 0x200>;
88 reg = <0x0 0x201>;
96 reg = <0x0 0x300>;
104 reg = <0x0 0x301>;
[all …]
/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_reg.h12 #define RVU_AF_MSIXTR_BASE (0x10)
13 #define RVU_AF_ECO (0x20)
14 #define RVU_AF_BLK_RST (0x30)
15 #define RVU_AF_PF_BAR4_ADDR (0x40)
16 #define RVU_AF_RAS (0x100)
17 #define RVU_AF_RAS_W1S (0x108)
18 #define RVU_AF_RAS_ENA_W1S (0x110)
19 #define RVU_AF_RAS_ENA_W1C (0x118)
20 #define RVU_AF_GEN_INT (0x120)
21 #define RVU_AF_GEN_INT_W1S (0x128)
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dqdu1000.dtsi28 #clock-cells = <0>;
34 #clock-cells = <0>;
40 #size-cells = <0>;
42 cpu0: cpu@0 {
45 reg = <0x0 0x0>;
46 clocks = <&cpufreq_hw 0>;
50 qcom,freq-domain = <&cpufreq_hw 0>;
68 reg = <0x0 0x100>;
69 clocks = <&cpufreq_hw 0>;
73 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am65-main.dtsi12 reg = <0x0 0x70000000 0x0 0x200000>;
15 ranges = <0x0 0x0 0x70000000 0x200000>;
17 atf-sram@0 {
18 reg = <0x0 0x20000>;
22 reg = <0xf0000 0x10000>;
26 reg = <0x100000 0x100000>;
37 reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
38 <0x00 0x01880000 0x00 0x90000>, /* GICR */
39 <0x00 0x6f000000 0x00 0x2000>, /* GICC */
40 <0x00 0x6f010000 0x00 0x1000>, /* GICH */
[all …]