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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ull-pinfunc.h16 #define MX6UL_PAD_UART5_TX_DATA__UART5_DTE_RX 0x00BC 0x0348 0x0644 0x0 0x6
18 #define MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x00C0 0x034C 0x0644 0x0 0x7
20 #define MX6UL_PAD_ENET1_RX_EN__UART5_DCE_RTS 0x00CC 0x0358 0x0640 0x1 0x5
22 #define MX6UL_PAD_ENET1_TX_DATA0__UART5_DTE_RTS 0x00D0 0x035C 0x0640 0x1 0x6
24 #define MX6UL_PAD_CSI_DATA02__UART5_DCE_RTS 0x01EC 0x0478 0x0640 0x8 0x7
27 #define MX6ULL_PAD_UART1_TX_DATA__UART5_DCE_TX 0x0084 0x0310 0x0000 0x9 0x0
28 #define MX6ULL_PAD_UART1_TX_DATA__UART5_DTE_RX 0x0084 0x0310 0x0644 0x9 0x4
29 #define MX6ULL_PAD_UART1_RX_DATA__UART5_DCE_RX 0x0088 0x0314 0x0644 0x9 0x5
30 #define MX6ULL_PAD_UART1_RX_DATA__UART5_DTE_TX 0x0088 0x0314 0x0000 0x9 0x0
31 #define MX6ULL_PAD_UART1_CTS_B__UART5_DCE_CTS 0x008C 0x0318 0x0000 0x9 0x0
[all …]
H A Dimx7ulp-pinfunc.h15 #define IMX7ULP_PAD_PTC0__PTC0 0x0000 0x0000 0x1 0x0
16 #define IMX7ULP_PAD_PTC0__TRACE_D15 0x0000 0x0000 0xa 0x0
17 #define IMX7ULP_PAD_PTC0__LPUART4_CTS_B 0x0000 0x0244 0x4 0x1
18 #define IMX7ULP_PAD_PTC0__LPI2C4_SCL 0x0000 0x0278 0x5 0x1
19 #define IMX7ULP_PAD_PTC0__TPM4_CLKIN 0x0000 0x0298 0x6 0x1
20 #define IMX7ULP_PAD_PTC0__FB_AD0 0x0000 0x0000 0x9 0x0
21 #define IMX7ULP_PAD_PTC1__PTC1 0x0004 0x0000 0x1 0x0
22 #define IMX7ULP_PAD_PTC1__TRACE_D14 0x0004 0x0000 0xa 0x0
23 #define IMX7ULP_PAD_PTC1__LPUART4_RTS_B 0x0004 0x0000 0x4 0x0
24 #define IMX7ULP_PAD_PTC1__LPI2C4_SDA 0x0004 0x027c 0x5 0x1
[all …]
H A Dimx6sx-pinfunc.h13 #define MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x0014 0x035C 0x07A8 0x0 0x1
14 #define MX6SX_PAD_GPIO1_IO00__USDHC1_VSELECT 0x0014 0x035C 0x0000 0x1 0x0
15 #define MX6SX_PAD_GPIO1_IO00__SPDIF_LOCK 0x0014 0x035C 0x0000 0x2 0x0
16 #define MX6SX_PAD_GPIO1_IO00__CCM_WAIT 0x0014 0x035C 0x0000 0x3 0x0
17 #define MX6SX_PAD_GPIO1_IO00__WDOG1_WDOG_ANY 0x0014 0x035C 0x0000 0x4 0x0
18 #define MX6SX_PAD_GPIO1_IO00__GPIO1_IO_0 0x0014 0x035C 0x0000 0x5 0x0
19 #define MX6SX_PAD_GPIO1_IO00__SNVS_HP_WRAPPER_VIO_5 0x0014 0x035C 0x0000 0x6 0x0
20 #define MX6SX_PAD_GPIO1_IO00__PHY_DTB_1 0x0014 0x035C 0x0000 0x7 0x0
21 #define MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x0018 0x0360 0x07AC 0x0 0x1
22 #define MX6SX_PAD_GPIO1_IO01__USDHC1_RESET_B 0x0018 0x0360 0x0000 0x1 0x0
[all …]
H A Dimxrt1170-pinfunc.h10 #define IMX_PAD_SION 0x40000000
17 #define IOMUXC_GPIO_LPSR_00_FLEXCAN3_TX 0x000 0x040 0x0 0x0 0x0
18 #define IOMUXC_GPIO_LPSR_00_MIC_CLK 0x000 0x040 0x0 0x1 0x0
19 #define IOMUXC_GPIO_LPSR_00_MQS_RIGHT 0x000 0x040 0x0 0x2 0x0
20 #define IOMUXC_GPIO_LPSR_00_ARM_CM4_EVENTO 0x000 0x040 0x0 0x3 0x0
21 #define IOMUXC_GPIO_LPSR_00_GPIO_MUX6_IO00 0x000 0x040 0x0 0x5 0x0
22 #define IOMUXC_GPIO_LPSR_00_LPUART12_TXD 0x000 0x040 0x0B0 0x6 0x0
23 #define IOMUXC_GPIO_LPSR_00_SAI4_MCLK 0x000 0x040 0x0C8 0x7 0x0
24 #define IOMUXC_GPIO_LPSR_00_GPIO12_IO00 0x000 0x040 0x0 0xA 0x0
26 #define IOMUXC_GPIO_LPSR_01_FLEXCAN3_RX 0x004 0x044 0x080 0x0 0x0
[all …]
/freebsd/sys/crypto/openssl/aarch64/
H A Decp_sm2p256-armv8.S9 .quad 0xffffffffffffffff,0xffffffff00000000,0xffffffffffffffff,0xfffffffeffffffff
12 .quad 0x53bbf40939d54123,0x7203df6b21c6052b,0xffffffffffffffff,0xfffffffeffffffff
15 .quad 0x8000000000000000,0xffffffff80000000,0xffffffffffffffff,0x7fffffff7fffffff
18 .quad 0xa9ddfa049ceaa092,0xb901efb590e30295,0xffffffffffffffff,0x7fffffff7fffffff
30 ldp x9,x10,[x0,#16]
34 extr x8,x9,x8,#1
35 extr x9,x10,x9,#1
40 stp x9,x10,[x0,#16]
53 ldp x9,x10,[x1,#16]
60 sbcs x9,x9,x13
[all …]
H A Dpoly1305-armv8.S31 mov x9,#0xfffffffc0fffffff
32 movk x9,#0x0fff,lsl#48
37 and x7,x7,x9 // &=0ffffffc0fffffff
38 and x9,x9,#-4
39 and x8,x8,x9 // &=0ffffffc0ffffffc
80 add x9,x8,x8,lsr#2 // s1 = r1 + (r1 >> 2)
98 mul x10,x5,x9 // h1*5*r1
99 umulh x11,x5,x9
112 mul x10,x6,x9 // h2*5*r1
175 mul x10,x5,x9 // h1*5*r1
[all …]
H A Dmd5-aarch64.S16 ldp w10, w11, [x0, #0] // .Load MD5 state->A and state->B
22 ldp w15, w20, [x1] // .Load 2 words of input data0 M[0],M[1]
31 movz x9, #0xa478 // .Load lower half of constant 0xd76aa478
32 movk x9, #0xd76a, lsl #16 // .Load upper half of constant 0xd76aa478
34 add w7, w8, w9 // Add constant 0xd76aa478
38 add w4, w11, w6 // Add X parameter round 1 A=FF(A, B, C, D, 0xd76aa478, s=7, M[0])
41 movz x16, #0xb756 // .Load lower half of constant 0xe8c7b756
42 movk x16, #0xe8c7, lsl #16 // .Load upper half of constant 0xe8c7b756
44 add w7, w9, w16 // Add constant 0xe8c7b756
48 add w5, w4, w14 // Add X parameter round 1 D=FF(D, A, B, C, 0xe8c7b756, s=12, M[1])
[all …]
H A Darmv8-mont.S35 add x29,sp,#0
40 ldr x9,[x2],#8 // bp[0]
42 ldp x7,x8,[x1],#16 // ap[0..1]
46 ldp x13,x14,[x3],#16 // np[0..1]
48 mul x6,x7,x9 // ap[0]*bp[0]
50 umulh x7,x7,x9
51 mul x10,x8,x9 // ap[1]*bp[0]
52 umulh x11,x8,x9
54 mul x15,x6,x4 // "tp[0]"*n0
57 // (*) mul x12,x13,x15 // np[0]*m1
[all …]
H A Dkeccak1600-armv8.S8 .quad 0,0,0,0,0,0,0,0
11 .quad 0x0000000000000001
12 .quad 0x0000000000008082
13 .quad 0x800000000000808a
14 .quad 0x8000000080008000
15 .quad 0x000000000000808b
16 .quad 0x0000000080000001
17 .quad 0x8000000080008081
18 .quad 0x8000000000008009
19 .quad 0x000000000000008a
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8ulp-pinfunc.h13 #define MX8ULP_PAD_PTD0__PTD0 0x0000 0x0000 0x1 0x0
14 #define MX8ULP_PAD_PTD0__I2S6_RX_BCLK 0x0000 0x0B44 0x7 0x1
15 #define MX8ULP_PAD_PTD0__SDHC0_RESET_B 0x0000 0x0000 0x8 0x0
16 #define MX8ULP_PAD_PTD0__FLEXSPI2_B_DQS 0x0000 0x0974 0x9 0x1
17 #define MX8ULP_PAD_PTD0__CLKOUT2 0x0000 0x0000 0xa 0x0
18 #define MX8ULP_PAD_PTD0__EPDC0_SDCLK_B 0x0000 0x0000 0xb 0x0
19 #define MX8ULP_PAD_PTD0__LP_APD_DBG_MUX_0 0x0000 0x0000 0xc 0x0
20 #define MX8ULP_PAD_PTD0__CLKOUT1 0x0000 0x0000 0xd 0x0
21 #define MX8ULP_PAD_PTD0__DEBUG_MUX0_0 0x0000 0x0000 0xe 0x0
22 #define MX8ULP_PAD_PTD0__DEBUG_MUX1_0 0x0000 0x0000 0xf 0x0
[all …]
/freebsd/crypto/openssl/crypto/md5/asm/
H A Dmd5-aarch64.pl18 my $output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef;
19 my $flavour = $#ARGV >= 0 && $ARGV[0] !~ m|\.| ? shift : undef;
21 $0 =~ m/(.*[\/\\])[^\/\\]+$/; my $dir=$1; my $xlate;
45 ldp w10, w11, [x0, #0] // Load MD5 state->A and state->B
51 ldp w15, w20, [x1] // Load 2 words of input data0 M[0],M[1]
60 movz x9, #0xa478 // Load lower half of constant 0xd76aa478
61 movk x9, #0xd76a, lsl #16 // Load upper half of constant 0xd76aa478
63 add w7, w8, w9 // Add constant 0xd76aa478
67 … add w4, w11, w6 // Add X parameter round 1 A=FF(A, B, C, D, 0xd76aa478, s=7, M[0])
70 movz x16, #0xb756 // Load lower half of constant 0xe8c7b756
[all …]
/freebsd/sys/arm64/arm64/
H A Dlocore.S48 .if (\val >> 16) & 0xffff != 0
51 .if (\val >> 32) & 0xffff != 0
54 .if (\val >> 48) & 0xffff != 0
184 mov fp, #0
202 brk 0
660 add x9, x28, x15
668 add x9, x28, x15
669 add x9, x9, x27
675 mov x9, x6
687 mov x9, x28
[all …]
/freebsd/lib/libc/aarch64/string/
H A Dstrcmp.S16 bic x8, x0, #0xf // x0 aligned to the boundary
17 and x9, x0, #0xf // x9 is the offset
18 bic x10, x1, #0xf // x1 aligned to the boundary
19 and x11, x1, #0xf // x11 is the offset
39 lsl x14, x9, #2
44 cmeq v5.16b, v0.16b, #0
45 cmeq v6.16b, v2.16b, #0
57 b.eq 0f
59 ldr q4, [x2, x9] // load permutation table
64 0:
[all …]
H A Dstrncmp.S16 bic x8, x0, #0xf // x0 aligned to the boundary
17 and x9, x0, #0xf // x9 is the offset
18 bic x10, x1, #0xf // x1 aligned to the boundary
19 and x11, x1, #0xf // x11 is the offset
25 mov x16, #0xf
45 lsl x14, x9, #2
50 cmeq v5.16b, v0.16b, #0
51 cmeq v6.16b, v1.16b, #0
63 b.eq 0f
65 ldr q4, [x14, x9] // load permutation table
[all …]
H A Dstrlcpy.S17 mov x9, x0 // stash copy of dst pointer
18 bic x10, x1, #0xf // src aligned
19 and x11, x1, #0xf // src offset
22 cmeq v1.16b, v1.16b, #0 // NUL found in head?
24 mov x8, #-1 // fill register with 0xfff..fff
39 cmeq v1.16b, v3.16b, #0 // NUL found in second chunk?
61 0:
62 cmeq v2.16b, v1.16b, #0 // NUL found in second chunk?
77 cmeq v2.16b, v1.16b, #0 // NUL found in second chunk?
86 b.hi 0b
[all …]
H A Dmemccpy.S19 mov x9, x0 // stash copy of src pointer
20 bic x10, x1, #0xf // src aligned
21 and x11, x1, #0xf // src offset
26 mov x8, #-1 // prepare a 0xfff..fff register
27 mov x6, #0xf
40 b.eq 0f
50 add x4, x9, x8 // dst + cnt
56 0:
65 cbz x5, 0f
77 add x4, x9, x8
[all …]
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_core/hsalsa20/ref2/
H A Dcore_hsalsa20_ref2.c23 x9, x10, x11, x12, x13, x14, x15; in crypto_core_hsalsa20() local
27 x0 = U32C(0x61707865); in crypto_core_hsalsa20()
28 x5 = U32C(0x3320646e); in crypto_core_hsalsa20()
29 x10 = U32C(0x79622d32); in crypto_core_hsalsa20()
30 x15 = U32C(0x6b206574); in crypto_core_hsalsa20()
32 x0 = LOAD32_LE(c + 0); in crypto_core_hsalsa20()
37 x1 = LOAD32_LE(k + 0); in crypto_core_hsalsa20()
45 x6 = LOAD32_LE(in + 0); in crypto_core_hsalsa20()
48 x9 = LOAD32_LE(in + 12); in crypto_core_hsalsa20()
50 for (i = ROUNDS; i > 0; i -= 2) { in crypto_core_hsalsa20()
[all …]
/freebsd/sys/arm64/vmm/
H A Dvmm_hyp_exception.S54 stp x8, x9, [sp, #(8 * 8)]
58 stp x0, x1, [sp, #(0 * 8)]
63 ldp x0, x1, [sp, #(0 * 8)]
67 ldp x8, x9, [sp, #(8 * 8)]
92 stp x8, x9, [x0, #(TF_X + 8 * 8)]
108 stp x2, x3, [x0, #(TF_X + 0 * 8)]
116 ldp x2, x3, [x0, #(TF_X + 0 * 8)]
131 ldp x8, x9, [x0, #(TF_X + 8 * 8)]
177 mov x9, #VTTBR_HOST
178 msr vttbr_el2, x9
[all …]
/freebsd/crypto/openssl/test/recipes/
H A D20-test_dhparam.t30 my $type = shift; #PKCS3 or X9.42?
31 my $gen = shift; #2, 5 or something else (0 is "something else")?
37 my $readbits = 0;
47 } elsif ($firstline eq "-----BEGIN X9.42 DH PARAMETERS-----") {
48 $pemtype = "X9.42";
69 $readtype = "X9.42";
76 if (defined $textdata[0] && $textdata[0] =~ /DH Parameters: \((\d+) bit\)/) {
82 $genline = "G: $gen (0x$gen)";
112 subtest "Read: 1024 bit X9.42 params, PEM file" => sub {
114 checkdhparams(data_file("x942-0-1024.pem"), "X9.42", 0, "PEM", 1024);
[all …]
H A D15-test_gendhparam.t21 expect => [ 'BEGIN X9.42 DH PARAMETERS', 'gindex:', 'pcounter:', 'SEED:' ],
33 expect => [ 'BEGIN X9.42 DH PARAMETERS', 'gindex:', 'pcounter:', 'SEED:' ],
39 expect => [ 'BEGIN X9.42 DH PARAMETERS', 'h:', 'pcounter:', 'SEED:' ],
46 expect => [ "BEGIN X9.42 DH PARAMETERS" ],
81 expect => [ 'BEGIN X9.42 DH PARAMETERS', 'GROUP:' ],
87 expect => [ 'BEGIN X9.42 DH PARAMETERS', 'GROUP:' ],
93 expect => [ 'BEGIN X9.42 DH PARAMETERS', 'GROUP:' ],
99 expect => [ 'BEGIN X9.42 DH PARAMETERS', 'GROUP:' ],
117 # pkeyopts => [ 'dh_paramgen_type:0', 'dh_paramgen_generator:5'],
144 if ($expected[0] eq 'ERROR') {
[all …]
/freebsd/crypto/openssl/crypto/poly1305/asm/
H A Dpoly1305-armv8.pl40 $output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef;
41 $flavour = $#ARGV >= 0 && $ARGV[0] !~ m|\.| ? shift : undef;
43 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
52 my ($ctx,$inp,$len,$padbit) = map("x$_",(0..3));
87 mov $s1,#0xfffffffc0fffffff
88 movk $s1,#0x0fff,lsl#48
93 and $r0,$r0,$s1 // &=0ffffffc0fffffff
95 and $r1,$r1,$s1 // &=0ffffffc0ffffffc
226 my ($R0,$R1,$S1,$R2,$S2,$R3,$S3,$R4,$S4) = map("v$_.4s",(0..8));
277 and x12,$h0,#0x03ffffff // base 2^64 -> base 2^26
[all …]
/freebsd/sys/arm64/linux/
H A Dlinux_support.S57 * Return 0 on success, errno on failure,
67 adr x9, futex_fault /* Load the fault handler */
68 SET_FAULT_HANDLER(x9, x4) /* And set it */
81 SET_FAULT_HANDLER(xzr, x9) /* Reset the fault handler */
89 adr x9, futex_fault
90 SET_FAULT_HANDLER(x9, x4)
104 SET_FAULT_HANDLER(xzr, x9)
112 adr x9, futex_fault
113 SET_FAULT_HANDLER(x9, x4)
127 SET_FAULT_HANDLER(xzr, x9)
[all …]
/freebsd/sys/contrib/libsodium/src/libsodium/crypto_core/salsa/ref/
H A Dcore_salsa_ref.c15 uint32_t x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, in crypto_core_salsa() local
21 j0 = x0 = 0x61707865; in crypto_core_salsa()
22 j5 = x5 = 0x3320646e; in crypto_core_salsa()
23 j10 = x10 = 0x79622d32; in crypto_core_salsa()
24 j15 = x15 = 0x6b206574; in crypto_core_salsa()
26 j0 = x0 = LOAD32_LE(c + 0); in crypto_core_salsa()
31 j1 = x1 = LOAD32_LE(k + 0); in crypto_core_salsa()
40 j6 = x6 = LOAD32_LE(in + 0); in crypto_core_salsa()
43 j9 = x9 = LOAD32_LE(in + 12); in crypto_core_salsa()
45 for (i = 0; i < rounds; i += 2) { in crypto_core_salsa()
[all …]
/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dat91-natte.dtsi13 #mux-control-cells = <0>;
15 mux-gpios = <&ioexp 0 GPIO_ACTIVE_HIGH>,
60 #size-cells = <0>;
62 i2c@0 {
63 reg = <0>;
65 #size-cells = <0>;
69 reg = <0x9>;
81 #size-cells = <0>;
85 reg = <0x9>;
97 #size-cells = <0>;
[all …]
/freebsd/contrib/googletest/googlemock/test/
H A Dgmock-pp-string_test.cc70 EXPECT_EXPANSION("0", GMOCK_PP_NARG0()); in TEST()
76 EXPECT_EXPANSION("0", GMOCK_PP_HAS_COMMA()); in TEST()
78 EXPECT_EXPANSION("0", GMOCK_PP_HAS_COMMA((, ))); in TEST()
83 EXPECT_EXPANSION("0", GMOCK_PP_IS_EMPTY(, )); in TEST()
84 EXPECT_EXPANSION("0", GMOCK_PP_IS_EMPTY(a)); in TEST()
85 EXPECT_EXPANSION("0", GMOCK_PP_IS_EMPTY(())); in TEST()
93 EXPECT_EXPANSION("2", GMOCK_PP_IF(0, 1, 2)); in TEST()
107 EXPECT_EXPANSION("0", GMOCK_PP_IS_BEGIN_PARENS(sss)); in TEST()
108 EXPECT_EXPANSION("0", GMOCK_PP_IS_BEGIN_PARENS(sss())); in TEST()
109 EXPECT_EXPANSION("0", GMOCK_PP_IS_BEGIN_PARENS(sss() sss)); in TEST()
[all …]

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